loadpatents
name:-0.01420783996582
name:-0.0094189643859863
name:-0.0035789012908936
Bhattacharya; Uddalak Patent Filings

Bhattacharya; Uddalak

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bhattacharya; Uddalak.The latest application filed is for "metal-oxide-semiconductor field-effect-transistors (mosfet) as antifuse elements".

Company Profile
3.9.12
  • Bhattacharya; Uddalak - Beaverton OR
  • Bhattacharya; Uddalak - Tigard OR
  • Bhattacharya, Uddalak - Tigrad OR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Hot carrier injection fuse memory
Grant 11,348,651 - Kulkarni , et al. May 31, 2
2022-05-31
Metal-oxide-semiconductor Field-effect-transistors (mosfet) As Antifuse Elements
App 20220045001 - CHAO; Yu-Lin ;   et al.
2022-02-10
Metal interconnect fuse memory arrays
Grant 11,239,149 - Dorgan , et al. February 1, 2
2022-02-01
Metal-oxide-semiconductor field-effect-transistors (MOSFET) as antifuse elements
Grant 11,189,564 - Chao , et al. November 30, 2
2021-11-30
Hot Carrier Injection Fuse Memory
App 20200105356 - KULKARNI; Sarvesh ;   et al.
2020-04-02
Metal-oxide-semiconductor Field-effect-transistors (mosfet) As Antifuse Elements
App 20190304907 - CHAO; Yu-Lin ;   et al.
2019-10-03
Metal Interconnect Fuse Memory Arrays
App 20190304893 - DORGAN; Vincent ;   et al.
2019-10-03
Systems, methods, and apparatuses for implementing die recovery in two-level memory (2LM) stacked die subsystems
Grant 10,249,597 - Pappu , et al.
2019-04-02
Systems, Methods, And Apparatuses For Implementing Die Recovery In Two-level Memory (2lm) Stacked Die Subsystems
App 20180096971 - PAPPU; LAKSHMINARAYANA ;   et al.
2018-04-05
Necked interconnect fuse structure for integrated circuits
Grant 9,679,845 - Chen , et al. June 13, 2
2017-06-13
Necked Interconnect Fuse Structure For Integrated Circuits
App 20170018499 - Chen; Zhanping ;   et al.
2017-01-19
Dual-port Static Random Access Memory (sram)
App 20160078926 - Kolar; Pramod ;   et al.
2016-03-17
Dual-port static random access memory (SRAM)
Grant 9,208,853 - Kolar , et al. December 8, 2
2015-12-08
Dual-port Static Random Access Memory (sram)
App 20140269019 - Kolar; Pramod ;   et al.
2014-09-18
Adaptive and dynamic stability enhancement for memories
Grant 8,451,670 - Kolar , et al. May 28, 2
2013-05-28
Adaptive and Dynamic Stability Enhancement for Memories
App 20120075938 - Kolar; Pramod ;   et al.
2012-03-29
Method for bi-directional data synchronization between different clock frequencies
Grant 6,956,918 - Chen , et al. October 18, 2
2005-10-18
Method for bi-directional data synchronization between different clock frequencies
App 20030002606 - Chen, Wenliang ;   et al.
2003-01-02

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed