Bhattacharya; Dipankar
Patent Applications and Registrations
Patent applications and USPTO patent grants for Bhattacharya; Dipankar.The latest application filed is for "azd3355 (lesogaberan) for treatment and prevention of nonalcoholic steatohepatitis (nash), liver fibrosis, and other liver conditions".
Company Profile
1.50.36
- Bhattacharya; Dipankar - Macungie PA US
- BHATTACHARYA; Dipankar - New York NY
- Bhattacharya; Dipankar - Lehigh County PA
- Bhattacharya; Dipankar - Maoungie PA
- Bhattacharya; Dipankar - Saratoga CA
- Bhattacharya, Dipankar - Maeungie PA
- Bhattacharya; Dipankar - Santa Clara CA
Patent Activity
| Patent | Date |
|---|---|
| Pulse selector system Grant 11,342,920 - Bhattacharya , et al. May 24, 2 | 2022-05-24 |
| Azd3355 (lesogaberan) For Treatment And Prevention Of Nonalcoholic Steatohepatitis (nash), Liver Fibrosis, And Other Liver Conditions App 20210330684 - DUDLEY; Joel ; et al. | 2021-10-28 |
| Hybrid impedance compensation in a buffer circuit Grant 8,598,941 - Bhattacharya , et al. December 3, 2 | 2013-12-03 |
| Voltage level translator circuit Grant 8,536,925 - Bhattacharya , et al. September 17, 2 | 2013-09-17 |
| Mode latching buffer circuit Grant 8,362,803 - Nicholas , et al. January 29, 2 | 2013-01-29 |
| Hybrid Impedance Compensation in a Buffer Circuit App 20120326768 - Bhattacharya; Dipankar ; et al. | 2012-12-27 |
| Mode Latching Buffer Circuit App 20120212256 - Nicholas; Peter J. ; et al. | 2012-08-23 |
| Impedance compensation in a buffer circuit Grant 8,159,262 - Bhattacharya , et al. April 17, 2 | 2012-04-17 |
| Electrostatic discharge protection circuit Grant 8,089,739 - Bhattacharya , et al. January 3, 2 | 2012-01-03 |
| Voltage Level Translator Circuit App 20110187431 - Bhattacharya; Dipankar ; et al. | 2011-08-04 |
| I/O buffer with low voltage semiconductor devices Grant 7,936,209 - Bhattacharya , et al. May 3, 2 | 2011-05-03 |
| Bias circuit scheme for improved reliability in high voltage supply with low voltage device Grant 7,902,904 - Kumar , et al. March 8, 2 | 2011-03-08 |
| I/O Buffer with Low Voltage Semiconductor Devices App 20100271118 - Bhattacharya; Dipankar ; et al. | 2010-10-28 |
| Electrostatic Discharge Protection Circuit App 20100232078 - Bhattacharya; Dipankar ; et al. | 2010-09-16 |
| Bias circuit scheme for improved reliability in high voltage supply with low voltage device App 20100141334 - Kumar; Pankaj ; et al. | 2010-06-10 |
| Aligning data in a wide, high-speed, source synchronous parallel link Grant 7,720,107 - Bhattacharya , et al. May 18, 2 | 2010-05-18 |
| Multiple-mode compensated buffer circuit Grant 7,642,807 - Bhattacharya , et al. January 5, 2 | 2010-01-05 |
| Enhanced output impedance compensation Grant 7,551,020 - Bhattacharya , et al. June 23, 2 | 2009-06-23 |
| Circuit for selectively bypassing a capacitive element Grant 7,529,071 - Bhattacharya , et al. May 5, 2 | 2009-05-05 |
| Power pin to power pin electro-static discharge (ESD) clamp Grant 7,529,070 - Bhattacharya , et al. May 5, 2 | 2009-05-05 |
| Method and apparatus for improving reliability of an integrated circuit having multiple power domains Grant 7,511,550 - Bhattacharya , et al. March 31, 2 | 2009-03-31 |
| Buffer circuit having multiplexed voltage level translation Grant 7,498,860 - Bhattacharya , et al. March 3, 2 | 2009-03-03 |
| Electrostatic discharge protection in a semiconductor device Grant 7,495,873 - Bhattacharya , et al. February 24, 2 | 2009-02-24 |
| Multiple-Mode Compensated Buffer Circuit App 20090002017 - Bhattacharya; Dipankar ; et al. | 2009-01-01 |
| Enhanced Output Impedance Compensation App 20080297226 - Bhattacharya; Dipankar ; et al. | 2008-12-04 |
| Circuit having enhanced input signal range Grant 7,432,762 - Bhattacharya , et al. October 7, 2 | 2008-10-07 |
| Buffer Circuit Having Multiplexed Voltage Level Translation App 20080238399 - Bhattacharya; Dipankar ; et al. | 2008-10-02 |
| Buffer circuit with enhanced overvoltage protection Grant 7,430,100 - Bhattacharya , et al. September 30, 2 | 2008-09-30 |
| Voltage level translator circuit with wide supply voltage range Grant 7,397,279 - Bhattacharya , et al. July 8, 2 | 2008-07-08 |
| Comparator circuit having reduced pulse width distortion Grant 7,391,825 - Bhattacharya , et al. June 24, 2 | 2008-06-24 |
| Buffer circuit with multiple voltage range Grant 7,382,168 - Bhattacharya , et al. June 3, 2 | 2008-06-03 |
| Unbiased token bucket Grant 7,369,489 - Bhattacharya , et al. May 6, 2 | 2008-05-06 |
| Method and Apparatus for Improving Reliability of an Integrated Circuit Having Multiple Power Domains App 20080074171 - Bhattacharya; Dipankar ; et al. | 2008-03-27 |
| Circuit for Selectively Bypassing a Capacitive Element App 20080074814 - Bhattacharya; Dipankar ; et al. | 2008-03-27 |
| Generating and merging lookup results to apply multiple features Grant 7,350,020 - Kanekar , et al. March 25, 2 | 2008-03-25 |
| Circuit having enhanced input signal range App 20070229157 - Bhattacharya; Dipankar ; et al. | 2007-10-04 |
| Floating well circuit having enhanced latch-up performance Grant 7,276,957 - Bhattacharya , et al. October 2, 2 | 2007-10-02 |
| Voltage level translator circuit with wide supply voltage range App 20070176635 - Bhattacharya; Dipankar ; et al. | 2007-08-02 |
| Differential buffer circuit with reduced output common mode variation Grant 7,248,079 - Bhattacharya , et al. July 24, 2 | 2007-07-24 |
| Differential buffer circuit with reduced output common mode variation App 20070115030 - Bhattacharya; Dipankar ; et al. | 2007-05-24 |
| Reference compensation circuit Grant 7,218,169 - Bhattacharya , et al. May 15, 2 | 2007-05-15 |
| Floating well circuit having enhanced latch-up performance App 20070075748 - Bhattacharya; Dipankar ; et al. | 2007-04-05 |
| Programmable reset signal that is independent of supply voltage ramp rate Grant 7,196,561 - Bhattacharya , et al. March 27, 2 | 2007-03-27 |
| Buffer circuit with multiple voltage range App 20070046338 - Bhattacharya; Dipankar ; et al. | 2007-03-01 |
| Generating and merging lookup results to apply multiple features Grant 7,177,978 - Kanekar , et al. February 13, 2 | 2007-02-13 |
| Buffer circuit with enhanced overvoltage protection App 20070019348 - Bhattacharya; Dipankar ; et al. | 2007-01-25 |
| Generating and merging lookup results to apply multiple features App 20070002862 - Kanekar; Bhushan Mangesh ; et al. | 2007-01-04 |
| Self-bypassing voltage level translator circuit Grant 7,145,364 - Bhattacharya , et al. December 5, 2 | 2006-12-05 |
| Method and system for providing redundancy within a network element Grant 7,139,928 - Bhattacharya , et al. November 21, 2 | 2006-11-21 |
| Power pin to power pin electro-static discharge (ESD) clamp App 20060203405 - Bhattacharya; Dipankar ; et al. | 2006-09-14 |
| Reliability comparator with hysteresis Grant 7,106,107 - Bhattacharya , et al. September 12, 2 | 2006-09-12 |
| Self-bypassing voltage level translator circuit App 20060192587 - Bhattacharya; Dipankar ; et al. | 2006-08-31 |
| Overvoltage tolerant input buffer Grant 7,098,694 - Bhattacharya , et al. August 29, 2 | 2006-08-29 |
| Comparator circuit having reduced pulse width distortion App 20060170461 - Bhattacharya; Dipankar ; et al. | 2006-08-03 |
| Reliability Comparator With Hysteresis App 20060170462 - Bhattacharya; Dipankar ; et al. | 2006-08-03 |
| Bias circuit having reduced power-up delay App 20060145749 - Bhattacharya; Dipankar ; et al. | 2006-07-06 |
| Voltage level translator circuit Grant 7,068,074 - Bhattacharya , et al. June 27, 2 | 2006-06-27 |
| Semiconductor resistance compensation with enhanced efficiency Grant 7,057,545 - Bhattacharya , et al. June 6, 2 | 2006-06-06 |
| Overvoltage tolerant input buffer App 20060103427 - Bhattacharya; Dipankar ; et al. | 2006-05-18 |
| High-speed memory for use in networking systems Grant 7,047,385 - Bhattacharya , et al. May 16, 2 | 2006-05-16 |
| Electrostatic discharge protection in a semiconductor device App 20060092589 - Bhattacharya; Dipankar ; et al. | 2006-05-04 |
| Semiconductor resistor Grant 7,034,653 - Bhattacharya , et al. April 25, 2 | 2006-04-25 |
| Voltage level translator circuit with feedback App 20060066381 - Bhattacharya; Dipankar ; et al. | 2006-03-30 |
| Programmable reset signal that is independent of supply voltage ramp rate App 20060044028 - Bhattacharya; Dipankar ; et al. | 2006-03-02 |
| Multiple voltage level detection circuit Grant 6,992,489 - Bhattacharya , et al. January 31, 2 | 2006-01-31 |
| Voltage level translator circuit App 20060001449 - Bhattacharya; Dipankar ; et al. | 2006-01-05 |
| Coms buffer having higher and lower voltage operation App 20050270065 - Bhattacharya, Dipankar ; et al. | 2005-12-08 |
| Multiple voltage level detection circuit App 20050174125 - Bhattacharya, Dipankar ; et al. | 2005-08-11 |
| Semiconductor resistor App 20050168319 - Bhattacharya, Dipankar ; et al. | 2005-08-04 |
| Reference compensation circuit App 20050134364 - Bhattacharya, Dipankar ; et al. | 2005-06-23 |
| Method and apparatus for aligning data in a wide, high-speed, source synchronous parallel link App 20050066142 - Bhattacharya, Dipankar ; et al. | 2005-03-24 |
| Distriburted QoS policing system and method Grant 6,826,150 - Bhattacharya , et al. November 30, 2 | 2004-11-30 |
| Generating and merging lookup results to apply multiple features App 20040170171 - Kanekar, Bhushan Mangesh ; et al. | 2004-09-02 |
| Voltage translator circuit for a mixed voltage circuit Grant 6,774,698 - Bhattacharya , et al. August 10, 2 | 2004-08-10 |
| Voltage Translator Circuit For A Mixed Voltage Circuit App 20040150454 - Bhattacharya, Dipankar ; et al. | 2004-08-05 |
| System for controlling variable length PCI burst data using a dummy final data phase and adjusting the burst length during transaction Grant 5,918,072 - Bhattacharya June 29, 1 | 1999-06-29 |
| Method and apparatus for arbitrating requests at two or more levels of priority using a single request line Grant 5,805,905 - Biswas , et al. September 8, 1 | 1998-09-08 |
| Programmable hold delay Grant 5,577,214 - Bhattacharya November 19, 1 | 1996-11-19 |
| Adaptive write-back method and apparatus wherein the cache system operates in a combination of write-back and write-through modes for a cache-based microprocessor system Grant 5,469,555 - Ghosh , et al. November 21, 1 | 1995-11-21 |
| Adaptive write-back method and apparatus wherein the cache system operates in a combination of write-back and write-through modes for a cache-based microprocessor system Grant 5,463,759 - Ghosh , et al. October 31, 1 | 1995-10-31 |
| Method and apparatus for local memory and system bus refreshing with single-port memory controller and rotating arbitration priority Grant 5,448,742 - Bhattacharya September 5, 1 | 1995-09-05 |
| Bus synchronization apparatus and method Grant 5,371,880 - Bhattacharya December 6, 1 | 1994-12-06 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.
| 