loadpatents
name:-0.010360956192017
name:-0.0083551406860352
name:-0.0075500011444092
Bhagavat; Milind Patent Filings

Bhagavat; Milind

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bhagavat; Milind.The latest application filed is for "high density cross link die with polymer routing layer".

Company Profile
7.7.8
  • Bhagavat; Milind - Los Altos CA
  • Bhagavat; Milind - Cupertino CA
  • Bhagavat; Milind - Medford MA US
  • Bhagavat; Milind - Fremont CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Multiple-die integrated circuit with integrated voltage regulator
Grant 11,011,495 - Bhagavat , et al. May 18, 2
2021-05-18
High density cross link die with polymer routing layer
Grant 10,923,430 - Lin , et al. February 16, 2
2021-02-16
High Density Cross Link Die With Polymer Routing Layer
App 20200411443 - Guo; Fei ;   et al.
2020-12-31
Circuit Board With Compact Passive Component Arrangement
App 20200185366 - Bhagavat; Milind ;   et al.
2020-06-11
Multiple-die Integrated Circuit With Integrated Voltage Regulator
App 20200066677 - Bhagavat; Milind ;   et al.
2020-02-27
Offset-aligned three-dimensional integrated circuit
Grant 10,573,630 - Wilkerson , et al. Feb
2020-02-25
Offset-aligned Three-dimensional Integrated Circuit
App 20190326272 - Wilkerson; Brett P. ;   et al.
2019-10-24
MEMS in-plane resonators
Grant 8,593,155 - Sparks , et al. November 26, 2
2013-11-26
High Noise Immunity and High Spatial Resolution Mutual Capacitive Touch Panel
App 20120299868 - Bhagavat; Milind ;   et al.
2012-11-29
MEMS In-Plane Resonators
App 20120112765 - Sparks; Andrew ;   et al.
2012-05-10
Method for capping a MEMS wafer
Grant 8,058,144 - Bhagavat , et al. November 15, 2
2011-11-15
Capped wafer method and apparatus
Grant 7,981,723 - Yang , et al. July 19, 2
2011-07-19
Capped Wafer Method and Apparatus
App 20100117221 - Yang; Xue'en ;   et al.
2010-05-13
Method for Capping a MEMS Wafer
App 20090294879 - Bhagavat; Milind ;   et al.
2009-12-03

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed