loadpatents
name:-0.015568017959595
name:-0.018043041229248
name:-0.0039658546447754
Bhadra; Jayanta Patent Filings

Bhadra; Jayanta

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bhadra; Jayanta.The latest application filed is for "run-time security protection system and method".

Company Profile
3.20.16
  • Bhadra; Jayanta - Austin TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Run-time security protection system and method
Grant 11,017,077 - Farkash , et al. May 25, 2
2021-05-25
System architecture method and apparatus for adaptive hardware fault detection with hardware metrics subsystem
Grant 10,495,691 - Sun , et al. De
2019-12-03
Autonomous hardware for application power usage optimization
Grant 10,481,674 - Bhadra , et al. Nov
2019-11-19
Run-time Security Protection System And Method
App 20190294785 - FARKASH; MONICA C. ;   et al.
2019-09-26
System Architecture Method and Apparatus for Adaptive Hardware Fault Detection with Hardware Metrics Subsystem
App 20190250210 - Sun; Xiao ;   et al.
2019-08-15
Autonomous Hardware For Application Power Usage Optimization
App 20180024614 - Bhadra; Jayanta ;   et al.
2018-01-25
Model-based runtime detection of insecure behavior for system on chip with security requirements
Grant 9,824,243 - Chen , et al. November 21, 2
2017-11-21
Model-Based Runtime Detection of Insecure Behavior for System on Chip with Security Requirements
App 20170076116 - Chen; Wen ;   et al.
2017-03-16
Systems and methods for analyzing transactions in a computer system
Grant 9,092,567 - Vedula , et al. July 28, 2
2015-07-28
Equivalence classes over parameter state space
Grant 9,069,762 - Feng , et al. June 30, 2
2015-06-30
Verification of design derived from power intent
Grant 9,002,694 - Feng , et al. April 7, 2
2015-04-07
Systems And Methods For Analyzing Transactions In A Computer System
App 20140006875 - VEDULA; VIVEKANANDA M. ;   et al.
2014-01-02
Equivalence Classes Over Parameter State Space
App 20130346375 - Feng; Xiushan ;   et al.
2013-12-26
Assertion-based design partitioning
Grant 8,584,063 - Feng , et al. November 12, 2
2013-11-12
Verification of Design Derived From Power Intent
App 20130297280 - Feng; Xiushan ;   et al.
2013-11-07
Automatic verification of dependency
Grant 8,555,226 - Feng , et al. October 8, 2
2013-10-08
Trace reconstruction for silicon validation of asynchronous systems-on-chip
Grant 8,234,618 - Bose , et al. July 31, 2
2012-07-31
System and method for circuit symbolic timing analysis of circuit designs
Grant 8,050,904 - Bhadra , et al. November 1, 2
2011-11-01
Stream based stimulus definition and delivery via interworking
Grant 7,945,418 - Bose , et al. May 17, 2
2011-05-17
Trace Reconstruction for Silicon Validation of Asynchronous Systems-on-Chip
App 20110107146 - Bose; Mrinal ;   et al.
2011-05-05
Stream Based Stimulus Definition and Delivery via Interworking
App 20100153053 - Bose; Mrinal ;   et al.
2010-06-17
Model correspondence method and device
Grant 7,650,579 - Abadir , et al. January 19, 2
2010-01-19
Design analysis tool and method for deriving correspondence between storage elements of two memory models
Grant 7,360,183 - Bhadra , et al. April 15, 2
2008-04-15
System and Method for Circuit Symbolic Timing Analysis of Circuit Designs
App 20080071515 - Bhadra; Jayanta ;   et al.
2008-03-20
Model correspondence method and device
App 20070277133 - Abadir; Magdy S. ;   et al.
2007-11-29
Design analysis tool and method for deriving correspondence between storage elements of two memory models
App 20060120167 - Bhadra; Jayanta ;   et al.
2006-06-08
Design analysis tool for path extraction and false path identification and method thereof
Grant 6,952,812 - Abadir , et al. October 4, 2
2005-10-04
Design analysis tool for path extraction and false path identification and method thereof
App 20020112213 - Abadir, Magdy S. ;   et al.
2002-08-15

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