Bez; Roberto

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bez; Roberto.The latest application filed is for "phase change memory device".

Company Profile

1.40.39

Bez; Roberto - Milan IT
Bez; Roberto - Milano IT
Bez; Roberto - US
Bez; Roberto - 20041 Agrate Brianza IT
Bez; Roberto - 20146 Milan IT
Bez; Roberto - Olivetti IT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Phase change memory device Grant 10,482,954 - Pellizzer , et al. Nov	2019-11-19
Phase change memory cell and manufacturing method thereof using minitrenches Grant 9,876,166 - Bez , et al. January 23, 2	2018-01-23
Phase Change Memory Device App 20170352414 - Pellizzer; Fabio ; et al.	2017-12-07
Phase change memory device Grant 9,779,805 - Pellizzer , et al. October 3, 2	2017-10-03
Phase change memory cells Grant 9,773,977 - Van Gerpen , et al. September 26, 2	2017-09-26
Phase Change Memory Cells App 20150357564 - Van Gerpen; Damon E. ; et al.	2015-12-10
Phase Change Memory Device App 20150287458 - Pellizzer; Fabio ; et al.	2015-10-08
Phase change memory cells and methods of forming phase change memory cells Grant 9,136,467 - Van Gerpen , et al. September 15, 2	2015-09-15
Phase change memory device Grant 9,064,565 - Pellizzer , et al. June 23, 2	2015-06-23
Memory Arrays and Methods of Forming Memory Cells App 20150144864 - Pellizzer; Fabio ; et al.	2015-05-28
Memory arrays and methods of forming memory cells Grant 8,975,148 - Pellizzer , et al. March 10, 2	2015-03-10
Phase Change Memory Device App 20140036583 - Pellizzer; Fabio ; et al.	2014-02-06
Memory Arrays and Methods of Forming Memory Cells App 20130341587 - Pellizzer; Fabio ; et al.	2013-12-26
Phase Change Memory Cells And Methods Of Forming Phase Change Memory Cells App 20130285002 - Van Gerpen; Damon E. ; et al.	2013-10-31
Phase change memory device Grant 8,553,453 - Pellizzer , et al. October 8, 2	2013-10-08
Memory arrays and methods of forming memory cells Grant 8,546,231 - Pellizzer , et al. October 1, 2	2013-10-01
Method Arrays and Methods of Forming Memory Cells App 20130126822 - Pellizzer; Fabio ; et al.	2013-05-23
Electrical fuse device based on a phase-change memory element and corresponding programming method Grant 8,410,527 - Pellizzer , et al. April 2, 2	2013-04-02
Method of making a floating gate non-volatile MOS semiconductor memory device with improved capacitive coupling Grant 8,384,148 - Tessariol , et al. February 26, 2	2013-02-26
Electrical Fuse Device Based On A Phase-change Memory Element And Corresponding Programming Method App 20110298087 - Pellizzer; Fabio ; et al.	2011-12-08
Phase Change Memory Cell And Manufacturing Method Thereof Using Minitrenches App 20110237045 - Bez; Roberto ; et al.	2011-09-29
Phase change memory cell and manufacturing method thereof using minitrenches Grant 7,993,957 - Bez , et al. August 9, 2	2011-08-09
Self-Aligned Bipolar Junction Transistors App 20110084247 - Pellizzer; Fabio ; et al.	2011-04-14
Self-aligned bipolar junction transistors Grant 7,875,513 - Pellizzer , et al. January 25, 2	2011-01-25
Process for self-aligned manufacture of integrated electronic devices Grant 7,772,084 - Bez , et al. August 10, 2	2010-08-10
Process for manufacturing a phase change memory array in Cu-damascene technology and phase change memory array thereby manufactured Grant 7,606,056 - Pellizzer , et al. October 20, 2	2009-10-20
Process for manufacturing integrated resistive elements with silicidation protection Grant 7,566,610 - Grossi , et al. July 28, 2	2009-07-28
Process For Manufacturing An Array Of Cells Including Selection Bipolar Junction Transistors With Projecting Conduction Regions App 20090014709 - Pellizzer; Fabio ; et al.	2009-01-15
Self-aligned integrated electronic devices Grant 7,468,535 - Bez , et al. December 23, 2	2008-12-23
Array of cells including a selection bipolar transistor and fabrication method thereof Grant 7,446,011 - Pellizzer , et al. November 4, 2	2008-11-04
Self-aligned process for manufacturing phase change memory cells Grant 7,422,926 - Pellizzer , et al. September 9, 2	2008-09-09
Sublithographic contact structure, phase change memory cell with optimized heater shape, and manufacturing method thereof Grant 7,372,166 - Casagrande , et al. May 13, 2	2008-05-13
Process for self-aligned manufacture of integrated electronic devices App 20080108200 - Bez; Roberto ; et al.	2008-05-08
Field programmable gate array device Grant 7,307,451 - Pellizzer , et al. December 11, 2	2007-12-11
Self-aligned biopolar junction transistors App 20070254446 - Pellizzer; Fabio ; et al.	2007-11-01
Process for manufacturing a phase change memory array in Cu-damascene technology and phase change memory array manufactured thereby Grant 7,259,040 - Pellizer , et al. August 21, 2	2007-08-21
Electrical Fuse Device Based On A Phase-change Memory Element And Corresponding Programming Method App 20070189053 - Pellizzer; Fabio ; et al.	2007-08-16
Process for manufacturing a phase change memory array in Cu-damascene technology and phase change memory array thereby manufactured App 20070148814 - Pellizzer; Fabio ; et al.	2007-06-28
Small area contact region, high efficiency phase change memory cell and fabrication method thereof Grant 7,227,171 - Bez , et al. June 5, 2	2007-06-05
Content addressable memory cell Grant 7,227,765 - De Sandre , et al. June 5, 2	2007-06-05
Array Of Cells Including A Selection Bipolar Transistor And Fabrication Method Thereof App 20070099347 - Pellizzer; Fabio ; et al.	2007-05-03
Integrated resistive elements with silicidation protection Grant 7,176,553 - Grossi , et al. February 13, 2	2007-02-13
Self-aligned process for manufacturing phase change memory cells App 20070020797 - Pellizzer; Fabio ; et al.	2007-01-25
Array of cells including a selection bipolar transistor and fabrication method thereof Grant 7,135,756 - Pellizzer , et al. November 14, 2	2006-11-14
Method and system for controlling MRAM write current to reduce power consumption Grant 7,110,289 - Sin , et al. September 19, 2	2006-09-19
Phase-change memory device and manufacturing process thereof App 20060202245 - Zuliani; Paola ; et al.	2006-09-14
Method of making a floating gate non-volatile MOS semiconductor memory device with improved capacitive coupling App 20060205136 - Tessariol; Paolo ; et al.	2006-09-14
Process for manufacturing integrated resistive elements with silicidation protection App 20060141730 - Grossi; Alessandro ; et al.	2006-06-29
Magnetic memory cell with plural read transistors Grant 7,012,832 - Sin , et al. March 14, 2	2006-03-14
Sublithographic contact structure, phase change memory cell with optimized heater shape, and manufacturing method thereof App 20060049391 - Casagrande; Giulio ; et al.	2006-03-09
Content addressable memory cell App 20060018183 - De Sandre; Guido ; et al.	2006-01-26
Process for manufacturing a memory device, in particular a phase change memory, including a silicidation step Grant 6,974,734 - Pellizzer , et al. December 13, 2	2005-12-13
Sublithographic contact structure, phase change memory cell with optimized heater shape, and manufacturing method thereof Grant 6,972,430 - Casagrande , et al. December 6, 2	2005-12-06
Phase change memory cell and manufacturing method thereof using minitrenches App 20050152208 - Bez, Roberto ; et al.	2005-07-14
Phase change memory cell and manufacturing method thereof using minitrenches Grant 6,891,747 - Bez , et al. May 10, 2	2005-05-10
Process for manufacturing a phase change memory array in Cu-damascene technology and phase change memory array manufactured thereby App 20050064606 - Pellizzer, Fabio ; et al.	2005-03-24
Field programmable gate array device App 20050062497 - Pellizzer, Fabio ; et al.	2005-03-24
Process for manufacturing device having selector transistors for storage elements and memory device fabricated thereby App 20050024933 - Pellizzer, Fabio ; et al.	2005-02-03
Process for manufacturing a memory device, in particular a phase change memory, including a silicidation step App 20040214415 - Pellizzer, Fabio ; et al.	2004-10-28
Process for self-aligned manufacture of integrated electronic devices App 20040173869 - Bez, Roberto ; et al.	2004-09-09
Array of cells including a selection bipolar transistor and fabrication method thereof App 20040150093 - Pellizzer, Fabio ; et al.	2004-08-05
Process for manufacturing integrated resistive elements with silicidation protection App 20040119142 - Grossi, Alessandro ; et al.	2004-06-24
Non-volatile memory cell with floating gate region autoaligned to the isolation and with a high coupling coefficient Grant 6,750,505 - Bez , et al. June 15, 2	2004-06-15
Nonvolatile memory cell with high programming efficiency Grant 6,734,490 - Esseni , et al. May 11, 2	2004-05-11
Sublithographic contact structure, phase change memory cell with optimized heater shape, and manufacturing method thereof App 20040012009 - Casagrande, Giulio ; et al.	2004-01-22
Phase change memory cell and manufacturing method thereof using minitrenches App 20030231530 - Bez, Roberto ; et al.	2003-12-18
Small area contact region, high efficiency phase change memory cell and fabrication method thereof App 20030219924 - Bez, Roberto ; et al.	2003-11-27
Process for manufacturing a non-volatile memory cell with a floating gate region autoaligned to the isolation and with a high coupling coefficient App 20030096477 - Bez, Roberto ; et al.	2003-05-22
Nonvolatile memory cell with high programming efficiency App 20020033499 - Esseni, David ; et al.	2002-03-21
Process for manufacturing a non-volatile memory cell with a floating gate region autoaligned to the isolation and with a high coupling coefficient App 20020025631 - Bez, Roberto ; et al.	2002-02-28
Method for erasing an electrically programmable and erasable non-volatile memory cell Grant 5,784,319 - Villa , et al. July 21, 1	1998-07-21

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.