| Patent | Date |
|---|
Triple oxide fill for trench isolation
Grant 6,825,097 - Beyer , et al. November 30, 2 | 2004-11-30 |
Method of formation of an oxynitride shallow trench isolation
Grant 6,764,922 - Beyer , et al. July 20, 2 | 2004-07-20 |
Oxynitride Shallow Trench Isolation And Method Of Formation
App 20040106267 - Beyer, Klaus D. ; et al. | 2004-06-03 |
Oxynitride shallow trench isolation and method of formation
Grant 6,709,951 - Beyer , et al. March 23, 2 | 2004-03-23 |
Triple oxide fill for trench isolation
App 20040029352 - Beyer, Klaus D. ; et al. | 2004-02-12 |
Shallow trench isolation for thin silicon/silicon-on-insulator substrates by utilizing polysilicon
Grant 6,602,759 - Ajmera , et al. August 5, 2 | 2003-08-05 |
Oxynitride shallow trench isolation and method of formation
App 20030015736 - Beyer, Klaus D. ; et al. | 2003-01-23 |
Oxynitride shallow trench isolation and method of formation
Grant 6,498,383 - Beyer , et al. December 24, 2 | 2002-12-24 |
Oxynitride Shallow Trench Isolation And Method Of Formation
App 20020177270 - Beyer, Klaus D. ; et al. | 2002-11-28 |
Shallow trench isolation for thin silicon/silicon-on-insulator substrates by utilizing polysilicon
App 20020072196 - Ajmera, Atul C. ; et al. | 2002-06-13 |
Large scale IC personalization method employing air dielectric structure for extended conductor
Grant 5,530,290 - Aitken , et al. June 25, 1 | 1996-06-25 |
Larce scale IC personalization method employing air dielectric structure for extended conductors
Grant 5,444,015 - Aitken , et al. August 22, 1 | 1995-08-22 |
Reach-through isolation silicon-on-insulator device
Grant 5,391,911 - Beyer , et al. February 21, 1 | 1995-02-21 |
Thermal dissipation of integrated circuits using diamond paths
Grant 5,313,094 - Beyer , et al. May 17, 1 | 1994-05-17 |
Reach-through isolation etching method for silicon-on-insulator devices
Grant 5,306,659 - Beyer , et al. April 26, 1 | 1994-04-26 |
Method of producing a thin silicon-on-insulator layer
Grant 5,234,535 - Beyer , et al. August 10, 1 | 1993-08-10 |
Isolated films using an air dielectric
Grant 5,232,866 - Beyer , et al. August 3, 1 | 1993-08-03 |
Buried air dielectric isolation of silicon islands
Grant 5,227,658 - Beyer , et al. July 13, 1 | 1993-07-13 |
Air-filled isolation trench with chemically vapor deposited silicon dioxide cap
Grant 5,098,856 - Beyer , et al. March 24, 1 | 1992-03-24 |
Chem-mech polishing method for producing coplanar metal/insulator films on a substrate
Grant 4,944,836 - Beyer , et al. * July 31, 1 | 1990-07-31 |
Method of trench filling
Grant 4,924,284 - Beyer , et al. May 8, 1 | 1990-05-08 |
Method of making defect free silicon islands using SEG
Grant 4,758,531 - Beyer , et al. July 19, 1 | 1988-07-19 |
Method of trench filling
Grant 4,745,081 - Beyer , et al. May 17, 1 | 1988-05-17 |
Planar void free isolation structure
Grant 4,680,614 - Beyer , et al. July 14, 1 | 1987-07-14 |
Method for removing protuberances at the surface of a semiconductor wafer using a chem-mech polishing technique
Grant 4,671,851 - Beyer , et al. June 9, 1 | 1987-06-09 |
Method for forming a void free isolation structure utilizing etch and refill techniques
Grant 4,528,047 - Beyer , et al. July 9, 1 | 1985-07-09 |
Omission of thick Si.sub.3 N.sub.4 layers in ISA schemes
Grant 4,333,794 - Beyer , et al. June 8, 1 | 1982-06-08 |
Cleaning process for p-type silicon surface
Grant 4,264,374 - Beyer , et al. April 28, 1 | 1981-04-28 |
Semiconductor fabrication method for improved device yield by minimizing pipes between common conductivity type regions
Grant 4,069,068 - Beyer , et al. January 17, 1 | 1978-01-17 |
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