Bernier; Joseph C.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bernier; Joseph C..The latest application filed is for "devices with adjustable dual-polarity trigger-and holding-votage/current for high level of electrostatic discharge protection in sub-micron mixed signal cmos/bicmos integrated".

Company Profile

0.8.7

Bernier; Joseph C. - Palm Bay FL

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Devices with adjustable dual-polarity trigger- and holding-votage/current for high level of electrostatic discharge protection in sub-micron mixed signal CMOS/BiCMOS integrated Grant 8,283,695 - Salcedo , et al. October 9, 2	2012-10-09
Devices With Adjustable Dual-polarity Trigger-and Holding-votage/current For High Level Of Electrostatic Discharge Protection In Sub-micron Mixed Signal Cmos/bicmos Integrated App 20110284922 - Salcedo; Javier A. ; et al.	2011-11-24
Devices with adjustable dual-polarity trigger-and holding-voltage/current for high level of electrostatic discharge protection in sub-micron mixed signal CMOS/BiCMOS integrated Grant 7,985,640 - Salcedo , et al. July 26, 2	2011-07-26
Devices With Adjustable Dual-polarity Trigger - And Holding-voltage/current For High Level Of Electrostatic Discharge Protection In Sub-micron Mixed Signal Cmos/bicmos Integrated App 20090261378 - SALCEDO; Javier A. ; et al.	2009-10-22
On-chip structure for electrostatic discharge (ESD) protection Grant 7,601,991 - Salcedo , et al. October 13, 2	2009-10-13
Devices with adjustable dual-polarity trigger- and holding-voltage/current for high level of electrostatic discharge protection in sub-micron mixed signal CMOS/BiCMOS integrated circuits Grant 7,566,914 - Salcedo , et al. July 28, 2	2009-07-28
Electrostatic discharge protection device for digital circuits and for applications with input/output bipolar voltage much higher than the core circuit power supply Grant 7,479,414 - Salcedo , et al. January 20, 2	2009-01-20
Electrostatic Discharge Protection Device For Digital Circuits And For Applications With Input/output Bipolar Voltage Much Higher Than The Core Circuit Power Supply App 20080044955 - Salcedo; Javier A. ; et al.	2008-02-21
On-chip Structure For Electrostatic Discharge (esd) Protection App 20080012044 - SALCEDO; Javier A. ; et al.	2008-01-17
Electrostatic discharge protection device for digital circuits and for applications with input/output bipolar voltage much higher than the core circuit power supply Grant 7,285,828 - Salcedo , et al. October 23, 2	2007-10-23
On-chip structure for electrostatic discharge (ESD) protection Grant 7,202,114 - Salcedo , et al. April 10, 2	2007-04-10
Devices with adjustable dual-polarity trigger- and holding-voltage/current for high level of electrostatic discharge protection in sub-micron mixed signal CMOS/BiCMOS integrated circuits App 20070007545 - Salcedo; Javier A. ; et al.	2007-01-11
Electrostatic discharge protection device for digital circuits and for applications with input/output bipolar voltage much higher than the core circuit power supply App 20060151836 - Salcedo; Javier A. ; et al.	2006-07-13
On-chip structure for electrostatic discharge (ESD) protection App 20050151160 - Salcedo, Javier A. ; et al.	2005-07-14
Electrostatic discharge locating apparatus and method Grant 6,064,340 - Croft , et al. May 16, 2	2000-05-16

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