| Patent | Date |
|---|
Transistors And Arrays Of Elevationally-Extending Strings Of Memory Cells
App 20220271127 - Gandhi; Ramanathan ; et al. | 2022-08-25 |
Transistors And Arrays Of Elevationally-Extending Strings Of Memory Cells
App 20220271142 - Gandhi; Ramanathan ; et al. | 2022-08-25 |
Sequential voltage ramp-down of access lines of non-volatile memory device
Grant 11,417,396 - Fayrushin , et al. August 16, 2 | 2022-08-16 |
Apparatus For Mitigating Program Disturb
App 20220084610 - Cantarelli; Daniele ; et al. | 2022-03-17 |
Semiconductor Pillars Having Triangular-Shaped Lateral Peripheries, and Integrated Assemblies
App 20220068969 - Fayrushin; Albert ; et al. | 2022-03-03 |
Memories for mitigating program disturb
Grant 11,200,958 - Cantarelli , et al. December 14, 2 | 2021-12-14 |
Semiconductor pillars having triangular-shaped lateral peripheries, and integrated assemblies
Grant 11,201,167 - Fayrushin , et al. December 14, 2 | 2021-12-14 |
Erasing Memory
App 20210233591 - Paolucci; Giovanni Maria ; et al. | 2021-07-29 |
Semiconductor Pillars Having Triangular-Shaped Lateral Peripheries, and Integrated Assemblies
App 20210175246 - Fayrushin; Albert ; et al. | 2021-06-10 |
Erasing memory
Grant 11,011,236 - Paolucci , et al. May 18, 2 | 2021-05-18 |
Erasing Memory
App 20210065810 - Paolucci; Giovanni Maria ; et al. | 2021-03-04 |
Memories For Mitigating Program Disturb
App 20210065827 - Cantarelli; Daniele ; et al. | 2021-03-04 |
Sequential Voltage Ramp-down Of Access Lines Of Non-volatile Memory Device
App 20210027839 - Fayrushin; Albert ; et al. | 2021-01-28 |
Apparatus and methods for mitigating program disturb
Grant 10,839,927 - Cantarelli , et al. November 17, 2 | 2020-11-17 |
Sequential voltage ramp-down of access lines of non-volatile memory device
Grant 10,803,948 - Fayrushin , et al. October 13, 2 | 2020-10-13 |
Sequential Voltage Ramp-down Of Access Lines Of Non-volatile Memory Device
App 20200143884 - Fayrushin; Albert ; et al. | 2020-05-07 |
Method, system and device for recessed contact in memory array
Grant 9,634,063 - Pellizzer , et al. April 25, 2 | 2017-04-25 |
Method, System And Device For Recessed Contact In Memory Array
App 20150318331 - Pellizzer; Fabio ; et al. | 2015-11-05 |
Method, system and device for recessed contact in memory array
Grant 9,111,857 - Pellizzer , et al. August 18, 2 | 2015-08-18 |
Apparatuses And Methods For Use In Selecting Or Isolating Memory Cells
App 20140269046 - Laurin; Luca ; et al. | 2014-09-18 |
Method, System And Device For Recessed Contact In Memory Array
App 20140085973 - Pellizzer; Fabio ; et al. | 2014-03-27 |
Phase change memory device with reduced programming disturbance
Grant 8,243,497 - Pellizzer , et al. August 14, 2 | 2012-08-14 |
Fabricating bipolar junction select transistors for semiconductor memories
Grant 8,076,211 - Pirovano , et al. December 13, 2 | 2011-12-13 |
Self-aligned vertical bipolar junction transistor for phase change memories
Grant 7,985,959 - Magistretti , et al. July 26, 2 | 2011-07-26 |
Self-Aligned Bipolar Junction Transistors
App 20110084247 - Pellizzer; Fabio ; et al. | 2011-04-14 |
Fabricating Bipolar Junction Select Transistors for Semiconductor Memories
App 20110039391 - Pirovano; Agostino ; et al. | 2011-02-17 |
Self-aligned bipolar junction transistors
Grant 7,875,513 - Pellizzer , et al. January 25, 2 | 2011-01-25 |
Array of vertical bipolar junction transistors, in particular selectors in a phase change memory device
Grant 7,872,326 - Magistretti , et al. January 18, 2 | 2011-01-18 |
Fabricating bipolar junction select transistors for semiconductor memories
Grant 7,847,373 - Pirovano , et al. December 7, 2 | 2010-12-07 |
Fabricating Bipolar Junction Select Transistors For Semiconductor Memories
App 20100155894 - PIROVANO; AGOSTINO ; et al. | 2010-06-24 |
Self-aligned vertical bipolar junction transistor for phase change memories
App 20100006816 - Magistretti; Michele ; et al. | 2010-01-14 |
Process for manufacturing an array of cells including selection bipolar junction transistors
Grant 7,563,684 - Pellizzer , et al. July 21, 2 | 2009-07-21 |
Memory device with unipolar and bipolar selectors
Grant 7,483,296 - Bedeschi , et al. January 27, 2 | 2009-01-27 |
Process For Manufacturing An Array Of Cells Including Selection Bipolar Junction Transistors With Projecting Conduction Regions
App 20090014709 - Pellizzer; Fabio ; et al. | 2009-01-15 |
Array Of Vertical Bipolar Junction Transistors, In Particular Selectors In A Phase Change Memory Device
App 20080203379 - Magistretti; Michele ; et al. | 2008-08-28 |
Self-aligned biopolar junction transistors
App 20070254446 - Pellizzer; Fabio ; et al. | 2007-11-01 |
Memory device with unipolar and bipolar selectors
App 20060062051 - Bedeschi; Ferdinando ; et al. | 2006-03-23 |
Process for manufacturing an array of cells including selection bipolar junction transistors
App 20060049392 - Pellizzer; Fabio ; et al. | 2006-03-09 |
Process for manufacturing an array of cells including selection bipolar junction transistors
Grant 6,989,580 - Pellizzer , et al. January 24, 2 | 2006-01-24 |
Process for manufacturing an array of cells including selection bipolar junction transistors
App 20040130000 - Pellizzer, Fabio ; et al. | 2004-07-08 |
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