| Patent | Date |
|---|
Symmetric Arrangement Of Field Plates In Semiconductor Devices
App 20220165853 - KANTAROVSKY; JOHNATAN AVRAHAM ; et al. | 2022-05-26 |
Symmetric arrangement of field plates in semiconductor devices
Grant 11,316,019 - Kantarovsky , et al. April 26, 2 | 2022-04-26 |
Substrate With A Buried Conductor Under An Active Region For Enhanced Thermal Conductivity And Rf Shielding
App 20220108951 - ADUSUMILLI; SIVA P. ; et al. | 2022-04-07 |
Symmetric Arrangement Of Field Plates In Semiconductor Devices
App 20220037482 - KANTAROVSKY; JOHNATAN AVRAHAM ; et al. | 2022-02-03 |
Iii-v Compound Semiconductor Layer Stacks With Electrical Isolation Provided By A Trap-rich Layer
App 20220029000 - Stamper; Anthony K. ; et al. | 2022-01-27 |
Method, apparatus, and system for fin-over-nanosheet complementary field-effect-transistor
Grant 11,201,152 - Xie , et al. December 14, 2 | 2021-12-14 |
Nanosheet field effect transistor with spacers between sheets
Grant 11,101,348 - Xie , et al. August 24, 2 | 2021-08-24 |
Uniform bottom spacer for VFET devices
Grant 10,916,650 - Bentley , et al. February 9, 2 | 2021-02-09 |
Self-aligned contact for vertical field effect transistor
Grant 10,896,972 - Anderson , et al. January 19, 2 | 2021-01-19 |
Vertical-transport field-effect transistors with self-aligned contacts
Grant 10,797,138 - Bourjot , et al. October 6, 2 | 2020-10-06 |
Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanism
Grant 10,756,203 - Frougier , et al. A | 2020-08-25 |
Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanism
Grant 10,741,675 - Frougier , et al. A | 2020-08-11 |
Uniform Bottom Spacer For Vfet Devices
App 20200194587 - Bentley; Steven ; et al. | 2020-06-18 |
Vertical nanowires formed on upper fin surface
Grant 10,685,847 - Bentley , et al. | 2020-06-16 |
Product that includes a plurality of vertical transistors with a shared conductive gate plug
Grant 10,629,500 - Soss , et al. | 2020-04-21 |
Self-aligned contact for vertical field effect transistor
Grant 10,622,458 - Anderson , et al. | 2020-04-14 |
Uniform bottom spacer for VFET devices
Grant 10,622,475 - Bentley , et al. | 2020-04-14 |
Self-aligned Contact For Vertical Field Effect Transistor
App 20200052096 - Anderson; Brent A. ; et al. | 2020-02-13 |
Sub-thermal Switching Slope Vertical Field Effect Transistor With Dual-gate Feedback Loop Mechanism
App 20200044058 - Frougier; Julien ; et al. | 2020-02-06 |
Sub-thermal Switching Slope Vertical Field Effect Transistor With Dual-gate Feedback Loop Mechanism
App 20200044057 - Frougier; Julien ; et al. | 2020-02-06 |
Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanism
Grant 10,553,705 - Frougier , et al. Fe | 2020-02-04 |
Nanosheet Field Effect Transistor With Spacers Between Sheets
App 20200035786 - Xie; Ruilong ; et al. | 2020-01-30 |
Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanism
Grant 10,546,945 - Frougier , et al. Ja | 2020-01-28 |
Uniform Bottom Spacer For Vfet Devices
App 20200027983 - Bentley; Steven ; et al. | 2020-01-23 |
Product That Includes A Plurality Of Vertical Transistors With A Shared Conductive Gate Plug
App 20200013684 - Soss; Steven ; et al. | 2020-01-09 |
Vertical field effect transistor with self-aligned contacts
Grant 10,497,798 - Xie , et al. De | 2019-12-03 |
Methods of forming merged source/drain regions on integrated circuit products
Grant 10,475,904 - Niimi , et al. Nov | 2019-11-12 |
Control of length in gate region during processing of VFET structures
Grant 10,461,196 - Park , et al. Oc | 2019-10-29 |
Method, Apparatus, And System For Fin-over-nanosheet Complementary Field-effect-transistor
App 20190326286 - Xie; Ruilong ; et al. | 2019-10-24 |
Negative capacitance integration through a gate contact
Grant 10,446,659 - Bentley , et al. Oc | 2019-10-15 |
Method for forming replacement gate structures for vertical transistors
Grant 10,446,451 - Soss , et al. Oc | 2019-10-15 |
Vertical-transport Field-effect Transistors With Self-aligned Contacts
App 20190312116 - Bourjot; Emilie ; et al. | 2019-10-10 |
Bitcell Layout For A Two-port Sram Cell Employing Vertical-transport Field-effect Transistors
App 20190279990 - Paul; Bipul C. ; et al. | 2019-09-12 |
Sub-thermal Switching Slope Vertical Field Effect Transistor With Dual-gate Feedback Loop Mechanism
App 20190259857 - Frougier; Julien ; et al. | 2019-08-22 |
Sub-thermal Switching Slope Vertical Field Effect Transistor With Dual-gate Feedback Loop Mechanism
App 20190259858 - Frougier; Julien ; et al. | 2019-08-22 |
Sub-thermal Switching Slope Vertical Field Effect Transistor With Dual-gate Feedback Loop Mechanism
App 20190259856 - Frougier; Julien ; et al. | 2019-08-22 |
Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanism
Grant 10,388,760 - Frougier , et al. A | 2019-08-20 |
Vertical Field Effect Transistor With Self-aligned Contacts
App 20190252267 - Xie; Ruilong ; et al. | 2019-08-15 |
Methods Of Forming Merged Source/drain Regions On Integrated Circuit Products
App 20190214484 - Niimi; Hiroaki ; et al. | 2019-07-11 |
Negative capacitance matching in gate electrode structures
Grant 10,332,969 - Galatage , et al. | 2019-06-25 |
Method of forming vertical FinFET device having self-aligned contacts
Grant 10,312,154 - Xie , et al. | 2019-06-04 |
Forming Contacts For Vfets
App 20190148494 - Xie; Ruilong ; et al. | 2019-05-16 |
Method of forming vertical field effect transistors with self-aligned gates and gate extensions and the resulting structure
Grant 10,283,621 - Xie , et al. | 2019-05-07 |
Forming contacts for VFETs
Grant 10,269,812 - Xie , et al. | 2019-04-23 |
Negative Capacitance Integration Through A Gate Contact
App 20190115444 - BENTLEY; Steven ; et al. | 2019-04-18 |
Negative Capacitance Matching In Gate Electrode Structures
App 20190115437 - Galatage; Rohit ; et al. | 2019-04-18 |
Insulated epitaxial structures in nanosheet complementary field effect transistors
Grant 10,256,158 - Frougier , et al. | 2019-04-09 |
Methods, apparatus, and system for improved nanowire/nanosheet spacers
Grant 10,249,710 - Bentley , et al. | 2019-04-02 |
Vertical channel field-effect transistor (FET) process compatible long channel transistors
Grant 10,243,073 - Anderson , et al. | 2019-03-26 |
Self-aligned Contacts For Vertical Field Effect Transistor Cell Height Scaling
App 20190088764 - XIE; Ruilong ; et al. | 2019-03-21 |
Method Of Forming Vertical Field Effect Transistors With Self-aligned Gates And Gate Extensions And The Resulting Structure
App 20190088767 - Xie; Ruilong ; et al. | 2019-03-21 |
Vertical FET with self-aligned source/drain regions and gate length based on channel epitaxial growth process
Grant 10,236,379 - Bentley , et al. | 2019-03-19 |
Vertical field effect transistor formation with critical dimension control
Grant 10,217,846 - Xie , et al. Feb | 2019-02-26 |
Control Of Length In Gate Region During Processing Of Vfet Structures
App 20190035938 - Park; Chanro ; et al. | 2019-01-31 |
Multiple directed self-assembly material mask patterning for forming vertical nanowires
Grant 10,186,577 - Bentley , et al. Ja | 2019-01-22 |
Vertical transport field effect transistors
Grant 10,170,617 - Kim , et al. J | 2019-01-01 |
Integrated Circuit Structure With Stepped Epitaxial Region
App 20180366372 - Suvarna; Puneet H. ; et al. | 2018-12-20 |
Integrated circuit structure with stepped epitaxial region
Grant 10,157,794 - Suvarna , et al. Dec | 2018-12-18 |
Negative capacitance matching in gate electrode structures
Grant 10,141,414 - Galatage , et al. Nov | 2018-11-27 |
Self-aligned Contact For Vertical Field Effect Transistor
App 20180337256 - Anderson; Brent A. ; et al. | 2018-11-22 |
Vertical Fet With Self-aligned Source/drain Regions And Gate Length Based On Channel Epitaxial Growth Process
App 20180331213 - Bentley; Steven ; et al. | 2018-11-15 |
Metal layer routing level for vertical FET SRAM and logic cell scaling
Grant 10,056,377 - Bentley , et al. August 21, 2 | 2018-08-21 |
Vertical Transport Field Effect Transistors
App 20180226505 - KIM; Jiseok ; et al. | 2018-08-09 |
Methods of forming a nano-sheet transistor device with a thicker gate stack and the resulting device
Grant 9,991,352 - Frougier , et al. June 5, 2 | 2018-06-05 |
Metal Layer Routing Level For Vertical Fet Sram And Logic Cell Scaling
App 20180145073 - BENTLEY; Steven ; et al. | 2018-05-24 |
Method And Structure To Control Channel Length In Vertical Fet Device
App 20180138046 - BENTLEY; Steven ; et al. | 2018-05-17 |
Method and structure to control channel length in vertical FET device
Grant 9,972,494 - Bentley , et al. May 15, 2 | 2018-05-15 |
Methods Of Forming Gate Electrodes On A Vertical Transistor Device
App 20180130895 - Park; Chanro ; et al. | 2018-05-10 |
Methods of forming gate electrodes on a vertical transistor device
Grant 9,966,456 - Park , et al. May 8, 2 | 2018-05-08 |
Methods, apparatus and system for self-aligned retrograde well doping for finFET devices
Grant 9,960,086 - Park , et al. May 1, 2 | 2018-05-01 |
Methods of forming nanosheet transistor with dielectric isolation of source-drain regions and related structure
Grant 9,947,804 - Frougier , et al. April 17, 2 | 2018-04-17 |
Methods, Apparatus And System For Self-aligned Retrograde Well Doping For Finfet Devices
App 20180090391 - Park; Mira ; et al. | 2018-03-29 |
Vertical Channel Field-effect Transistor (fet) Process Compatible Long Channel Transistors
App 20180053843 - Anderson; Brent A. ; et al. | 2018-02-22 |
Method, Apparatus, And System For Reducing Dopant Concentrations In Channel Regions Of Finfet Devices
App 20180033789 - Bentley; Steven ; et al. | 2018-02-01 |
Directed self-assembly material etch mask for forming vertical nanowires
Grant 9,865,682 - Bentley , et al. January 9, 2 | 2018-01-09 |
Metal layer routing level for vertical FET SRAM and logic cell scaling
Grant 9,825,032 - Bentley , et al. November 21, 2 | 2017-11-21 |
Methods, Apparatus, And System For Improved Nanowire/nanosheet Spacers
App 20170317169 - Bentley; Steven ; et al. | 2017-11-02 |
Method of forming semiconductor structure including suspended semiconductor layer and resulting structure
Grant 9,805,988 - Bentley , et al. October 31, 2 | 2017-10-31 |
Devices and methods of forming VFET with self-aligned replacement metal gates aligned to top spacer post top source drain EPI
Grant 9,773,708 - Zhang , et al. September 26, 2 | 2017-09-26 |
Vertical Nanowires Formed On Upper Fin Surface
App 20170263465 - Bentley; Steven ; et al. | 2017-09-14 |
Method, Apparatus And System For Improved Nanowire/nanosheet Spacers
App 20170250250 - Bentley; Steven ; et al. | 2017-08-31 |
Method, apparatus and system for improved nanowire/nanosheet spacers
Grant 9,748,335 - Bentley , et al. August 29, 2 | 2017-08-29 |
Directed self-assembly material growth mask for forming vertical nanowires
Grant 9,698,025 - Bentley , et al. July 4, 2 | 2017-07-04 |
Early PTS with buffer for channel doping control
Grant 9,647,086 - Bentley , et al. May 9, 2 | 2017-05-09 |
Method of enhancing surface doping concentration of source/drain regions
Grant 9,613,817 - Bentley , et al. April 4, 2 | 2017-04-04 |
Semiconductor structure with multilayer III-V heterostructures
Grant 9,577,042 - Bentley , et al. February 21, 2 | 2017-02-21 |
Early Pts With Buffer For Channel Doping Control
App 20170047425 - BENTLEY; Steven ; et al. | 2017-02-16 |
Semiconductor Structure With Multilayer Iii-v Heterostructures
App 20170047404 - BENTLEY; Steven ; et al. | 2017-02-16 |
Methods of forming transistor structures including forming channel material after formation processes to prevent damage to the channel material
Grant 9,570,588 - Akarvardar , et al. February 14, 2 | 2017-02-14 |
Methods of forming embedded source/drain regions on finFET devices
Grant 9,530,869 - Akarvardar , et al. December 27, 2 | 2016-12-27 |
Methods Of Forming Embedded Source/drain Regions On Finfet Devices
App 20160268399 - Akarvardar; Murat Kerem ; et al. | 2016-09-15 |
Buglossoides`MALIN `
Grant 9,439,379 - Bentley September 13, 2 | 2016-09-13 |
Buglossoides 'MALIN'
App 20160227723 - Bentley; Steven | 2016-08-11 |
FinFET device including a uniform silicon alloy fin
Grant 9,406,803 - Jacob , et al. August 2, 2 | 2016-08-02 |
Methods Of Forming Transistor Structures
App 20160190289 - AKARVARDAR; Murat Kerem ; et al. | 2016-06-30 |
Finfet Device Including A Uniform Silicon Alloy Fin
App 20160190323 - Jacob; Ajey Poovannummoottil ; et al. | 2016-06-30 |
Particle removal with minimal etching of silicon-germanium
App 20160181087 - Foster; John ; et al. | 2016-06-23 |
Methods of forming substrates comprised of different semiconductor materials and the resulting device
Grant 9,368,578 - Pawlak , et al. June 14, 2 | 2016-06-14 |
Device isolation in FinFET CMOS
Grant 9,305,846 - Jacob , et al. April 5, 2 | 2016-04-05 |
Methods for the production of integrated circuits comprising epitaxially grown replacement structures
Grant 9,299,775 - Bentley , et al. March 29, 2 | 2016-03-29 |
Multiple Directed Self-assembly Material Mask Patterning For Forming Vertical Nanowires
App 20160071930 - Bentley; Steven ; et al. | 2016-03-10 |
Directed Self-assembly Material Etch Mask For Forming Vertical Nanowires
App 20160071929 - Bentley; Steven ; et al. | 2016-03-10 |
Directed Self-assembly Material Growth Mask For Forming Vertical Nanowires
App 20160071845 - Bentley; Steven ; et al. | 2016-03-10 |
Methods of fabricating semiconductor fin structures
Grant 9,236,309 - Park , et al. January 12, 2 | 2016-01-12 |
Methods Of Fabricating Semiconductor Fin Structures
App 20150340289 - PARK; Chanro ; et al. | 2015-11-26 |
Semiconductor Devices Including An Electrically-decoupled Fin And Methods Of Forming The Same
App 20150325436 - Bentley; Steven ; et al. | 2015-11-12 |
Methods of forming transistor devices with different threshold voltages and the resulting products
Grant 9,178,036 - Xie , et al. November 3, 2 | 2015-11-03 |
Methods For The Production Of Integrated Circuits Comprising Epitaxially Grown Replacement Structures
App 20150303249 - Bentley; Steven ; et al. | 2015-10-22 |
Method to form defect free replacement fins by H2 anneal
Grant 9,165,837 - Fronheiser , et al. October 20, 2 | 2015-10-20 |
Methods Of Forming Epitaxial Semiconductor Material On Source/drain Regions Of A Finfet Semiconductor Device And The Resulting Devices
App 20150214369 - Fronheiser; Jody A. ; et al. | 2015-07-30 |
Device Isolation In Finfet Cmos
App 20150140761 - Jacob; Ajey Poovannummoottil ; et al. | 2015-05-21 |
Methods Of Forming Substrates Comprised Of Different Semiconductor Materials And The Resulting Device
App 20140217467 - Pawlak; Bartlomiej Jan ; et al. | 2014-08-07 |
Methods of forming fins for a FinFET semiconductor device using a mandrel oxidation process
Grant 8,716,156 - Pawlak , et al. May 6, 2 | 2014-05-06 |
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