Bennett; David W.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bennett; David W..The latest application filed is for "method for selective deposition of dielectric layers on semiconductor structures".

Company Profile

1.26.4

Bennett; David W. - Longmont CO
Bennett; David W. - San Jose CA US
Bennett; David W. - Silverthorne CO US
Bennett; David W. - Templeton MA
Bennett; David W. - Lafayette CO
Bennett; David W. - San Diego CA
Bennett; David W. - Erie CO

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
User controlled file synchronization limits Grant 10,430,400 - Bennett , et al. O	2019-10-01
Searching data files using a key map Grant 9,946,720 - Bennett , et al. April 17, 2	2018-04-17
Protection against unauthorized cloning of electronic devices Grant 9,900,300 - Bennett , et al. February 20, 2	2018-02-20
Data deduplication with encryption Grant 9,773,118 - Bennett , et al. September 26, 2	2017-09-26
Generation of public-private key pairs Grant 9,641,328 - Bennett , et al. May 2, 2	2017-05-02
Protection of shared data Grant 9,202,074 - Bennett , et al. December 1, 2	2015-12-01
Processor and cache arrangement with selective caching between first-level and second-level caches Grant 8,868,833 - Bennett , et al. October 21, 2	2014-10-21
Secure cloud computing infrastructure Grant 8,839,004 - Bennett , et al. September 16, 2	2014-09-16
Synchronization of parallel memory accesses in a dataflow circuit Grant 8,473,880 - Bennett , et al. June 25, 2	2013-06-25
Generation of cache architecture from a high-level language description Grant 8,473,904 - Sundararajan , et al. June 25, 2	2013-06-25
Optimization of cache architecture generated from a high-level language description Grant 8,468,510 - Sundararajan , et al. June 18, 2	2013-06-18
Synchronization of external memory accesses in a dataflow machine Grant 8,332,597 - Bennett December 11, 2	2012-12-11
Methods for automatically generating fault mitigation strategies for electronic system designs Grant 7,930,662 - Sundararajan , et al. April 19, 2	2011-04-19
Floating-point processing unit for successive floating-point operations Grant 7,917,567 - Mason , et al. March 29, 2	2011-03-29
Method For Selective Deposition Of Dielectric Layers On Semiconductor Structures App 20110053336 - Hwang; Kiuchul ; et al.	2011-03-03
Separating a high-level programming language program into hardware and software components Grant 7,823,117 - Bennett October 26, 2	2010-10-26
Determining sizes of FIFO buffers between functional blocks in an electronic circuit Grant 7,817,655 - Bennett , et al. October 19, 2	2010-10-19
Compiling HLL into massively pipelined systems Grant 7,315,991 - Bennett January 1, 2	2008-01-01
Method and system for designing a multiprocessor Grant 7,310,594 - Ganesan , et al. December 18, 2	2007-12-18
Modular panel and storage system for flat items such as media discs and holders therefor App 20060180486 - Bennett; David W.	2006-08-17
Device for labeling and storing computer discs Grant 6,991,101 - Bennett January 31, 2	2006-01-31
Modular design method and system for programmable logic devices Grant 6,817,005 - Mason , et al. November 9, 2	2004-11-09
Device and method for labeling and storing computer discs App 20040206655 - Bennett, David W.	2004-10-21
Apparatus and method for automatically generating circuit designs that meet user output requirements Grant 6,539,534 - Bennett March 25, 2	2003-03-25
Modular design method and system for programmable logic devices App 20010047509 - Mason, Jeffrey M. ; et al.	2001-11-29

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