| Patent | Date |
|---|
Power connector with load current sensing
Grant 10,148,106 - Bencuya De | 2018-12-04 |
Power Connector With Load Current Sensing
App 20170264115 - BENCUYA; IZAK | 2017-09-14 |
Power connector with load current sensing
Grant 9,685,806 - Bencuya June 20, 2 | 2017-06-20 |
Self unplugging power connector with load current sensing
Grant 9,537,258 - Bencuya January 3, 2 | 2017-01-03 |
Power Connector With Load Current Sensing
App 20150137770 - BENCUYA; IZAK | 2015-05-21 |
Self Unplugging Power Connector With Load Current Sensing
App 20150137757 - BENCUYA; IZAK | 2015-05-21 |
FET device having ultra-low on-resistance and low gate charge
Grant 8,710,584 - Bencuya , et al. April 29, 2 | 2014-04-29 |
Method of manufacture and structure for a trench transistor having a heavy body region
Grant 8,476,133 - Mo , et al. July 2, 2 | 2013-07-02 |
Method of Forming a FET Having Ultra-low On-resistance and Low Gate Charge
App 20120171828 - Bencuya; Izak ; et al. | 2012-07-05 |
Method of forming a FET having ultra-low on-resistance and low gate charge
Grant 8,101,484 - Bencuya , et al. January 24, 2 | 2012-01-24 |
Method of manufacturing a trench transistor having a heavy body region
Grant 8,044,463 - Mo , et al. October 25, 2 | 2011-10-25 |
Method of Manufacturing a Trench Transistor Having a Heavy Body Region
App 20100264487 - Mo; Brian Sze-Ki ; et al. | 2010-10-21 |
Method of Forming a FET Having Ultra-low On-resistance and Low Gate Charge
App 20100258864 - Bencuya; Izak ; et al. | 2010-10-14 |
Method of forming a FET having ultra-low on-resistance and low gate charge
Grant 7,745,289 - Bencuya , et al. June 29, 2 | 2010-06-29 |
Method of manufacturing a trench transistor having a heavy body region
Grant 7,736,978 - Mo , et al. June 15, 2 | 2010-06-15 |
Method of Manufacturing a Trench Transistor Having a Heavy Body Region
App 20100112767 - Mo; Brian Sze-Ki ; et al. | 2010-05-06 |
Method of manufacturing a trench transistor having a heavy body region
Grant 7,696,571 - Mo , et al. April 13, 2 | 2010-04-13 |
Method of Manufacturing a Trench Transistor Having a Heavy Body Region
App 20090134458 - Mo; Brian Sze-Ki ; et al. | 2009-05-28 |
Field effect transistor and method of its manufacture
Grant 7,511,339 - Mo , et al. March 31, 2 | 2009-03-31 |
Method of manufacturing a trench transistor having a heavy body region
App 20070042551 - Mo; Brian Sze-Ki ; et al. | 2007-02-22 |
Method of manufacturing a trench transistor having a heavy body region
Grant 7,148,111 - Mo , et al. December 12, 2 | 2006-12-12 |
Method of forming a FET having ultra-low on-resistance and low gate charge
App 20050153497 - Bencuya, Izak ; et al. | 2005-07-14 |
Method of manufacturing a trench transistor having a heavy body region
App 20050079676 - Mo, Brian Sze-Ki ; et al. | 2005-04-14 |
Method of manufacturing a trench transistor having a heavy body region
Grant 6,828,195 - Mo , et al. December 7, 2 | 2004-12-07 |
Field effect transistor and method of its manufacture
App 20040145015 - Mo, Brian Sze-Ki ; et al. | 2004-07-29 |
Method of forming vertical mosfet with ultra-low on-resistance and low gate charge
App 20040142523 - Bencuya, Izak ; et al. | 2004-07-22 |
Field effect transistor and method of its manufacture
Grant 6,710,406 - Mo , et al. March 23, 2 | 2004-03-23 |
Vertical MOSFET with ultra-low resistance and low gate charge
Grant 6,696,726 - Bencuya , et al. February 24, 2 | 2004-02-24 |
Field effect transistor and method of its manufacture
App 20030127688 - Mo, Brian Sze-Ki ; et al. | 2003-07-10 |
Field effect transistor and method of its manufacture
App 20020140027 - Mo, Brian Sze-Ki ; et al. | 2002-10-03 |
Field effect transistor and method of its manufacture
Grant 6,429,481 - Mo , et al. August 6, 2 | 2002-08-06 |
Self-aligned method of fabricating terrace gate DMOS transistor
Grant 5,879,994 - Kwan , et al. March 9, 1 | 1999-03-09 |
Integrated zener diode overvoltage protection structures in power DMOS device applications
Grant 5,767,550 - Calafut , et al. June 16, 1 | 1998-06-16 |
Method of fabricating a self-aligned contact trench DMOS transistor structure
Grant 5,665,619 - Kwan , et al. September 9, 1 | 1997-09-09 |
Method for fabricating high voltage transistor having trenched termination
Grant 5,605,852 - Bencuya February 25, 1 | 1997-02-25 |
Integrated zener diode protection structures and fabrication methods for DMOS power devices
Grant 5,602,046 - Calafut , et al. February 11, 1 | 1997-02-11 |
Method of fabricating self-aligned contact trench DMOS transistors
Grant 5,567,634 - Hebert , et al. October 22, 1 | 1996-10-22 |
High voltage transistor having edge termination utilizing trench technology
Grant 5,430,324 - Bencuya July 4, 1 | 1995-07-04 |
Closed cell transistor with built-in voltage clamp
Grant 5,136,349 - Yilmaz , et al. August 4, 1 | 1992-08-04 |
Insulated gate transistor array
Grant 4,779,123 - Bencuya , et al. October 18, 1 | 1988-10-18 |
Junction field effect transistor
Grant 4,751,556 - Cogan , et al. June 14, 1 | 1988-06-14 |
Method of fabricating a junction field effect transistor utilizing epitaxial overgrowth and vertical junction formation
Grant 4,651,407 - Bencuya March 24, 1 | 1987-03-24 |
Method of making junction field effect transistor of static induction type
Grant 4,611,384 - Bencuya , et al. September 16, 1 | 1986-09-16 |
Method of fabricating junction field effect transistors
Grant 4,551,909 - Cogan , et al. November 12, 1 | 1985-11-12 |
Fabrication of junction field effect transistor with filled grooves
Grant 4,543,706 - Bencuya , et al. October 1, 1 | 1985-10-01 |
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