Ben-Tzur; Mira
Patent Applications and Registrations
Patent applications and USPTO patent grants for Ben-Tzur; Mira.The latest application filed is for "method of forming a floating metal structure in an integrated circuit".
- Ben-Tzur; Mira - Sunnyvale CA
| Patent | Date |
|---|---|
| Method of forming a floating metal structure in an integrated circuit Grant 7,227,212 - Ben-Tzur , et al. June 5, 2 | 2007-06-05 |
| Protection of low-k dielectric in a passivation level Grant 7,192,867 - Ben-Tzur , et al. March 20, 2 | 2007-03-20 |
| Dual-damascene process and associated floating metal structures Grant 7,026,235 - Ben-Tzur , et al. April 11, 2 | 2006-04-11 |
| Integrated circuit with improved RC delay Grant 7,018,942 - Ben-Tzur , et al. March 28, 2 | 2006-03-28 |
| Aluminum-filled via structure with barrier layer Grant 6,977,217 - Ben-Tzur , et al. December 20, 2 | 2005-12-20 |
| Low-k dielectric layer with overlying adhesion layer Grant 6,939,792 - Jahangiri , et al. September 6, 2 | 2005-09-06 |
| Method of making borderless contacts in an integrated circuit Grant 6,911,395 - Qiao , et al. June 28, 2 | 2005-06-28 |
| Low-k dielectric layer with air gaps Grant 6,903,002 - Ben-Tzur , et al. June 7, 2 | 2005-06-07 |
| Reticle repeater monitor wafer and method for verifying reticles Grant 6,844,235 - Jones , et al. January 18, 2 | 2005-01-18 |
| Integrated circuit with improved RC delay Grant 6,841,878 - Ben-Tzur , et al. January 11, 2 | 2005-01-11 |
| Method of forming a floating metal structure in an integrated circuit Grant 6,835,616 - Ben-Tzur , et al. December 28, 2 | 2004-12-28 |
| Metal stack for local interconnect layer Grant 6,774,033 - Ben-Tzur , et al. August 10, 2 | 2004-08-10 |
| Borderless contact architecture Grant 6,713,831 - Sadoughi , et al. March 30, 2 | 2004-03-30 |
| Integrated circuit with improved RC delay Grant 6,660,661 - Ben-Tzur , et al. December 9, 2 | 2003-12-09 |
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