| Patent | Date |
|---|
Apparatus and Methods for Fractional Synchronization Using Direct Digital Frequency Synthesis
App 20220254394 - Shalmani; Soheyl Ziabakhsh ; et al. | 2022-08-11 |
Apparatus And Methods For Low Power Frequency Clock Generation And Distribution
App 20220171425 - Parvizi; Mahdi ; et al. | 2022-06-02 |
High-order phase tracking loop with segmented proportional and integral controls
Grant 11,349,486 - Aouini , et al. May 31, 2 | 2022-05-31 |
High-order phase tracking loop with segmented proportional and integral controls
App 20220149847 - Aouini; Sadok ; et al. | 2022-05-12 |
Apparatus and methods for high frequency clock generation
Grant 11,245,401 - Parvizi , et al. February 8, 2 | 2022-02-08 |
Digital-to-analog conversion with sign modulation
Grant 11,233,523 - Oveis Gharan , et al. January 25, 2 | 2022-01-25 |
Apparatus and methods for digital fractional phase locked loop with a current mode low pass filter
Grant 11,218,155 - Wen , et al. January 4, 2 | 2022-01-04 |
High Bandwidth Under-sampled Successive Approximation Register Analog To Digital Converter With Nonlinearity Minimization
App 20210391867 - Weng; Junxian ; et al. | 2021-12-16 |
Highly linear phase rotators with continuous rotation
Grant 11,201,723 - Lam , et al. December 14, 2 | 2021-12-14 |
High resolution analog to digital converter with factoring and background clock calibration
Grant 11,196,438 - Shalmani , et al. December 7, 2 | 2021-12-07 |
Apparatus and methods for low power clock generation in multi-channel high speed devices
Grant 11,196,534 - Parvizi , et al. December 7, 2 | 2021-12-07 |
High Resolution Analog To Digital Converter With Factoring And Background Clock Calibration
App 20210359696 - Shalmani; Soheyl Ziabakhsh ; et al. | 2021-11-18 |
Digitally enhanced digital-to-analog converter resolution
Grant 11,171,664 - Honarparvar , et al. November 9, 2 | 2021-11-09 |
Digital-to-analog converter and generation of high-bandwidth analog signals
Grant 11,171,661 - Oveis Gharan , et al. November 9, 2 | 2021-11-09 |
Apparatus And Methods For High Frequency Clock Generation
App 20210313992 - Parvizi; Mahdi ; et al. | 2021-10-07 |
Apparatus And Methods For Digital Fractional Phase Locked Loop With A Current Mode Low Pass Filter
App 20210273644 - Wen; Tingjun ; et al. | 2021-09-02 |
Digital-to-Analog Converter and Generation of High-Bandwidth Analog Signals
App 20210211135 - OVEIS GHARAN; Shahab ; et al. | 2021-07-08 |
Apparatus and methods for digital phase locked loop with analog proportional control function
Grant 11,012,081 - Parvizi , et al. May 18, 2 | 2021-05-18 |
Estimating clock phase error based on channel conditions
Grant 10,985,900 - Abdo , et al. April 20, 2 | 2021-04-20 |
Apparatus and Methods for Digital Phase Locked Loop with Analog Proportional Control Function
App 20210111729 - Parvizi; Mahdi ; et al. | 2021-04-15 |
Successive approximation register analog to digital converter based phase-locked loop with programmable range
Grant 10,979,059 - Shalmani , et al. April 13, 2 | 2021-04-13 |
High bandwidth under-sampled successive approximation register analog to digital converter with nonlinearity minimization
Grant 10,965,300 - Weng , et al. March 30, 2 | 2021-03-30 |
Apparatus and methods for characterization of high frequency and high data rate signals
Grant 10,938,405 - Honarparvar , et al. March 2, 2 | 2021-03-02 |
High resolution successive approximation register analog to digital converter with factoring and background clock calibration
Grant 10,931,292 - Shalmani , et al. February 23, 2 | 2021-02-23 |
Apparatus and methods for high frequency clock generation
Grant 10,903,841 - Parvizi , et al. January 26, 2 | 2021-01-26 |
Built-in jitter loading and state of polarization generation to characterize optical transceivers
App 20200412520 - Abdo; Ahmad ; et al. | 2020-12-31 |
Clock recovery circuits, systems and implementation for increased optical channel density
Grant 10,855,380 - Aouini , et al. December 1, 2 | 2020-12-01 |
Apparatus and methods for digital fractional phase locked loop with a current mode low pass filter
Grant 10,848,164 - Wen , et al. November 24, 2 | 2020-11-24 |
Noise-shaping enhanced gated ring oscillator based analog-to-digital converters
Grant 10,826,514 - Honarparvar , et al. November 3, 2 | 2020-11-03 |
Built-in jitter loading and state of polarization generation to characterize optical transceivers
App 20200344038 - Aouini; Sadok ; et al. | 2020-10-29 |
Built-in jitter loading and state of polarization generation to characterize optical transceivers
Grant 10,805,064 - Aouini , et al. October 13, 2 | 2020-10-13 |
High-order phase tracking loop with segmented proportional and integral controls
App 20200274537 - Aouini; Sadok ; et al. | 2020-08-27 |
High-order phase tracking loop with segmented proportional and integral controls
Grant 10,749,536 - Aouini , et al. A | 2020-08-18 |
Apparatus and methods for realization of N time interleaved digital-to-analog converters
Grant 10,727,854 - Greshishchev , et al. | 2020-07-28 |
Coarse-fine gain-tracking loop and method of operating
Grant 10,715,169 - Aouini , et al. | 2020-07-14 |
Apparatus and methods for digital phase locked loop with analog proportional control function
Grant 10,715,155 - Parvizi , et al. | 2020-07-14 |
Techniques and circuits for time-interleaved injection locked voltage controlled oscillators with jitter accumulation reset
Grant 10,680,585 - Aouini , et al. | 2020-06-09 |
Fully differential traveling wave series push-pull mach-zehnder modulator
Grant 10,678,112 - Parvizi , et al. | 2020-06-09 |
Fractional frequency synthesis by sigma-delta modulating frequency of a reference clock
App 20200177194 - Aouini; Sadok ; et al. | 2020-06-04 |
Fully differential traveling wave series push-pull Mach-Zehnder Modulator
App 20200081314 - Parvizi; Mahdi ; et al. | 2020-03-12 |
Quarter-rate charge-steering decision feedback equalizer (DFE)
Grant 10,554,453 - Parvizi , et al. Fe | 2020-02-04 |
Quarter-rate charge-steering decision feedback equalizer (DFE) taps
Grant 10,536,303 - Pike , et al. Ja | 2020-01-14 |
High-order phase tracking loop with segmented proportional and integral controls
Grant 10,516,403 - Aouini , et al. Dec | 2019-12-24 |
Techniques and circuits for time-interleaved injection locked Voltage Controlled Oscillators with jitter accumulation reset
App 20190312573 - Aouini; Sadok ; et al. | 2019-10-10 |
Extremely-fine resolution sub-ranging current mode Digital-Analog-Converter using Sigma-Delta modulators
Grant 10,425,099 - Aouini , et al. Sept | 2019-09-24 |
Digital-to-analog converter and generation of high-bandwidth analog signals
Grant 10,374,623 - Oveis Gharan , et al. | 2019-08-06 |
Patterned accumulation mode capacitive phase shifter
Grant 10,330,962 - Calvo , et al. | 2019-06-25 |
Clock recovery circuits, systems and implementation for increased optical channel density
App 20190190617 - Aouini; Sadok ; et al. | 2019-06-20 |
Fine resolution high speed linear delay element
Grant 10,320,374 - Parvizi , et al. | 2019-06-11 |
Techniques and circuits for on-chip jitter and phase noise measurement in a digital test environment
Grant 10,281,523 - Aouini , et al. | 2019-05-07 |
Clock recovery circuits, systems and implementation for increased optical channel density
Grant 10,243,671 - Aouini , et al. | 2019-03-26 |
Techniques And Circuits For On-chip Jitter And Phase Noise Measurement In A Digital Test Environment
App 20190086471 - AOUINI; Sadok ; et al. | 2019-03-21 |
Optical clock recovery using feedback phase rotator with non-linear compensation
Grant 10,187,197 - Aouini , et al. Ja | 2019-01-22 |
Optical Clock Recovery Using Feedback Phase Rotator With Non-linear Compensation
App 20180331818 - Aouini; Sadok ; et al. | 2018-11-15 |
Fine Resolution High Speed Linear Delay Element
App 20180302070 - Parvizi; Mahdi ; et al. | 2018-10-18 |
Optical clock recovery using feedback phase rotator with non-linear compensation
Grant 10,063,367 - Aouini , et al. August 28, 2 | 2018-08-28 |
High order hybrid phase locked loop with digital scheme for jitter suppression
Grant 9,787,466 - Aouini , et al. October 10, 2 | 2017-10-10 |
High Order Hybrid Phase Locked Loop With Digital Scheme For Jitter Suppression
App 20170264425 - Aouini; Sadok ; et al. | 2017-09-14 |
Method and system for phase and byte alignment on a multiplexed high speed bus
Grant 8,451,870 - Kurowski , et al. May 28, 2 | 2013-05-28 |
Method and system for phase and byte alignment on a multiplexed high speed bus
Grant 7,742,507 - Kurowski , et al. June 22, 2 | 2010-06-22 |
| 