Beer; Peter

Patent Applications and Registrations

Patent applications and USPTO patent grants for Beer; Peter.The latest application filed is for "method of operating an integrated circuit, and integrated circuit".

Company Profile

0.40.50

Beer; Peter - Mannheim DE
Beer; Peter - Weilheim DE
Beer; Peter - Weilhelm DE
Beer; Peter - Tutzing DE
Beer; Peter - Fontainbleau FR
Beer; Peter - Fontainebleau FR
Beer; Peter - Munchen DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
System and method for automated transfer and evaluation of the quality of mass data of a technical process or a technical project Grant 8,051,048 - Beer , et al. November 1, 2	2011-11-01
Integrated semiconductor memory with distributor line for redundant data lines Grant 7,929,362 - Beer April 19, 2	2011-04-19
Memory device having an evaluation circuit Grant 7,821,856 - Beer October 26, 2	2010-10-26
Method of Operating an Integrated Circuit, and Integrated Circuit App 20090268505 - Beer; Peter	2009-10-29
Integrated electrical module with regular and redundant elements Grant 7,573,761 - Beer August 11, 2	2009-08-11
Memory Device Having An Evaluation Circuit App 20090067274 - Beer; Peter	2009-03-12
Method and apparatus for masking known fails during memory tests readouts Grant 7,490,274 - Hoffmann , et al. February 10, 2	2009-02-10
Method for accessing a memory Grant 7,468,910 - Beer December 23, 2	2008-12-23
Method and apparatus for checking output signals of an integrated circuit Grant 7,380,182 - Beer , et al. May 27, 2	2008-05-27
System and method for automated transfer and evaluation of the quality of mass data of a technical process or a technical project App 20080052330 - Beer; Peter ; et al.	2008-02-28
Integrated Semiconductor Memory and Method for Operating an Integrated Semiconductor Memory App 20080049525 - Beer; Peter	2008-02-28
Method For Accessing A Memory App 20080002486 - Beer; Peter	2008-01-03
System and method for quantity-related comparison between planning and default data of a technical process or a technical project App 20080004932 - Beer; Peter ; et al.	2008-01-03
Integrated Electrical Module With Regular And Redundant Elements App 20070280011 - Beer; Peter	2007-12-06
System and method for automated and structured transfer of technical documents and the management of the transferred documents in a database App 20070276872 - Beer; Peter ; et al.	2007-11-29
Integrated memory having a test circuit for functional testing of the memory Grant 7,302,622 - Beer November 27, 2	2007-11-27
Memory module, test system and method for testing one or a plurality of memory modules Grant 7,231,562 - Ohlhoff , et al. June 12, 2	2007-06-12
Adiabatic rotational switching memory element including a ferromagnetic decoupling layer Grant 7,205,596 - Klostermann , et al. April 17, 2	2007-04-17
Test circuit and method for testing an integrated memory circuit Grant 7,197,678 - Ohlhoff , et al. March 27, 2	2007-03-27
Test system and method for testing memory circuits Grant 7,162,663 - Beer , et al. January 9, 2	2007-01-09
Memory chip with test logic taking into consideration the address of a redundant word line and method for testing a memory chip Grant 7,159,156 - Beer January 2, 2	2007-01-02
Method and apparatus for masking known fails during memory tests readouts Grant 7,137,049 - Hoffmann , et al. November 14, 2	2006-11-14
Adiabatic rotational switching memory element including a ferromagnetic decoupling layer App 20060244021 - Klostermann; Ulrich ; et al.	2006-11-02
Method and apparatus for masking known fails during memory tests readouts App 20060242492 - Hoffmann; Jochen ; et al.	2006-10-26
Test device, test system and method for testing a memory circuit Grant 7,107,501 - Ohlhoff , et al. September 12, 2	2006-09-12
MRAM with vertical storage element in two layer-arrangement and field sensor Grant 7,088,612 - Braun , et al. August 8, 2	2006-08-08
Memory circuit and method for reading out data Grant 7,080,297 - Beer July 18, 2	2006-07-18
System and method for monitoring the status and progress of a technical process or of a technical project App 20060129879 - Alznauer; Richard ; et al.	2006-06-15
Apparatus and method for reading out defect information items from an integrated chip Grant 7,038,956 - Beer May 2, 2	2006-05-02
Dynamic memory cell Grant 7,009,869 - Beer March 7, 2	2006-03-07
MRAM with vertical storage element in two layer-arrangement and field sensor App 20060039186 - Braun; Daniel ; et al.	2006-02-23
Integrated memory circuit having a redundancy circuit and a method for replacing a memory area Grant 6,985,390 - Beer January 10, 2	2006-01-10
Read-out circuit for a dynamic memory circuit, memory cell array, and method for amplifying and reading data stored in a memory cell array Grant 6,922,365 - Beer July 26, 2	2005-07-26
Method and apparatus for checking output signals of an integrated circuit App 20050114734 - Beer, Peter ; et al.	2005-05-26
Integrated semiconductor circuit configuration Grant 6,891,431 - Beer , et al. May 10, 2	2005-05-10
Method and test circuit for testing a dynamic memory circuit Grant 6,862,234 - Versen , et al. March 1, 2	2005-03-01
Integrated memory having a test circuit for functional testing of the memory App 20050041497 - Beer, Peter	2005-02-24
Method for testing semiconductor chips Grant 6,858,447 - Hartmann , et al. February 22, 2	2005-02-22
Apparatus and method for reading out defect information items from an integrated chip App 20050030822 - Beer, Peter	2005-02-10
Method and test circuit for testing a dynamic memory circuit App 20040257893 - Versen, Martin ; et al.	2004-12-23
Memory module, test system and method for testing one or a plurality of memory modules App 20040260987 - Ohlhoff, Carsten ; et al.	2004-12-23
Memory cell configuration for a DRAM memory with a contact bit terminal for two trench capacitors of different rows Grant 6,831,320 - Beer December 14, 2	2004-12-14
Integrated memory circuit having a redundancy circuit and a method for replacing a memory area App 20040246792 - Beer, Peter	2004-12-09
Method for precharging memory cells of a dynamic semiconductor memory during power-up and semiconductor memory Grant 6,829,185 - Beer December 7, 2	2004-12-07
Method and apparatus for masking known fails during memory tests readouts App 20040221210 - Hoffmann, Jochen ; et al.	2004-11-04
Circuit configuration for reading out a programmable link Grant 6,813,200 - Beer November 2, 2	2004-11-02
Circuit configuration for selectively transmitting information items from a measuring device to chips on a wafer during chip fabrication Grant 6,784,683 - Beer August 31, 2	2004-08-31
Circuit configuration for reading out a programmable link App 20040156243 - Beer, Peter	2004-08-12
Dynamic memory cell App 20040151020 - Beer, Peter	2004-08-05
Method for writing to a defect address memory, and test circuit having a defect address memory App 20040153947 - Beer, Peter	2004-08-05
Integrated circuit having a current measuring unit Grant 6,756,787 - Ohlhoff , et al. June 29, 2	2004-06-29
Evaluation circuit for a DRAM Grant 6,754,110 - Beer , et al. June 22, 2	2004-06-22
Integrated semiconductor memory fabrication method Grant 6,740,917 - Beer May 25, 2	2004-05-25
Memory module having a memory cell and method for fabricating the memory module Grant 6,737,695 - Beer May 18, 2	2004-05-18
Read-out circuit for a dynamic memory circuit, memory cell array, and method for amplifying and reading data stored in a memory cell array App 20040090833 - Beer, Peter	2004-05-13
Method for on-chip testing of memory cells of an integrated memory circuit Grant 6,728,147 - Beer , et al. April 27, 2	2004-04-27
Integrated semiconductor circuit configuration App 20040066209 - Beer, Peter ; et al.	2004-04-08
Memory circuit and method for reading out data App 20040064768 - Beer, Peter	2004-04-01
Memory circuit with a test mode for writing test data App 20040062103 - Beer, Peter	2004-04-01
Test system and method for testing memory circuits App 20040062102 - Beer, Peter ; et al.	2004-04-01
Memory cell configuration for a DRAM memory with a contact bit terminal for two trench capacitors of different rows App 20040062124 - Beer, Peter	2004-04-01
Self-test circuit and a method for testing a memory with the self-test circuit App 20040057307 - Fuhrmann, Dirk ; et al.	2004-03-25
Test circuit of an integrated memory circuit for coding assessment data and method for testing the memory circuit App 20040057302 - Fuhrmann, Dirk ; et al.	2004-03-25
Memory, module with crossed bit lines, and method for reading the memory module App 20040013013 - Beer, Peter ; et al.	2004-01-22
Test circuit and method for testing an integrated memory circuit App 20040015757 - Ohlhoff, Carsten ; et al.	2004-01-22
Memory chip with test logic taking into consideration the address of a redundant word line and method for testing a memory chip App 20040001375 - Beer, Peter	2004-01-01
Memory module with improved electrical properties Grant 6,670,665 - Beer , et al. December 30, 2	2003-12-30
Semiconductor chip with trimmable oscillator Grant 6,671,221 - Beer , et al. December 30, 2	2003-12-30
Test device, test system and method for testing a memory circuit App 20030226074 - Ohlhoff, Carsten ; et al.	2003-12-04
Configuration for measurement of internal voltages of an integrated semiconductor apparatus Grant 6,657,452 - Beer , et al. December 2, 2	2003-12-02
Integrated memory and method for testing an integrated memory Grant 6,639,861 - Stief , et al. October 28, 2	2003-10-28
Memory chip having a test mode and method for checking memory cells of a repaired memory chip Grant 6,639,856 - Beer , et al. October 28, 2	2003-10-28
Memory module, method for activating a memory cell, and method for repairing a defective memory cell Grant 6,636,447 - Beer October 21, 2	2003-10-21
Method for determining the temperature of a semiconductor chip and semiconductor chip with temperature measuring configuration Grant 6,612,738 - Beer , et al. September 2, 2	2003-09-02
Memory module with improved electrical properties App 20030146461 - Beer, Peter ; et al.	2003-08-07
Method for precharging memory cells of a dynamic semiconductor memory during power-up and semiconductor memory App 20030086322 - Beer, Peter	2003-05-08
Integrated circuit having a current measuring unit App 20030057987 - Ohlhoff, Carsten ; et al.	2003-03-27
Method for testing semiconductor chips App 20030059962 - Hartmann, Udo ; et al.	2003-03-27
Method for on-chip testing of memory cells of an integrated memory circuit App 20030021169 - Beer, Peter ; et al.	2003-01-30
Integrated semiconductor memory and fabrication method App 20030011010 - Beer, Peter	2003-01-16
Evaluation circuit for a DRAM App 20030007391 - Beer, Peter ; et al.	2003-01-09
Integrated memory circuit and method for reading a data item from a memory cell App 20030002351 - Beer, Peter ; et al.	2003-01-02
Memory chip having a test mode and method for checking memory cells of a repaired memory chip App 20020191454 - Beer, Peter ; et al.	2002-12-19
Memory module, method for activating a memory cell, and method for repairing a defective memory cell App 20020181302 - Beer, Peter	2002-12-05
Semiconductor chip with trimmable oscillator App 20020177267 - Beer, Peter ; et al.	2002-11-28
Memory module having a memory cell and method for fabricating the memory module App 20020175360 - Beer, Peter	2002-11-28
Circuit configuration for selectively transmitting information items from a measuring device to chips on a wafer during chip fabrication App 20020153918 - Beer, Peter	2002-10-24
Integrated memory and method for testing an integrated memory App 20020154560 - Stief, Reidar ; et al.	2002-10-24
Method for determining the temperature of a semiconductor chip and semiconductor chip with temperature measuring configuration App 20010026576 - Beer, Peter ; et al.	2001-10-04
Configuration for measurement of internal voltages in an integrated semiconductor apparatus App 20010005143 - Beer, Peter ; et al.	2001-06-28