loadpatents
name:-0.003993034362793
name:-0.015738964080811
name:-0.00052785873413086
Bedichek; Robert Patent Filings

Bedichek; Robert

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bedichek; Robert.The latest application filed is for "consistency checking for translated intructions".

Company Profile
0.15.3
  • Bedichek; Robert - Palo Alto CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Translating instructions in a speculative processor
Grant 9,875,103 - Torvalds , et al. January 23, 2
2018-01-23
Method for integration of interpretation and translation in a microprocessor
Grant 8,418,153 - Bedichek , et al. April 9, 2
2013-04-09
Consistency Checking For Translated Intructions
App 20120036502 - Banning; John ;   et al.
2012-02-09
Checking for instruction invariance to execute previously obtained translation code by comparing instruction to a copy stored when write operation to the memory portion occur
Grant 7,904,891 - Banning , et al. March 8, 2
2011-03-08
Method For Integration Of Interpretation And Translation In A Microprocessor
App 20100262955 - Bedichek; Robert ;   et al.
2010-10-14
Method for switching between interpretation and dynamic translation in a processor system based upon code sequence execution counts
Grant 7,761,857 - Bedichek , et al. July 20, 2
2010-07-20
Translating Instructions In A Speculative Processor
App 20100169613 - Torvalds; Linus ;   et al.
2010-07-01
Method for translating instructions in a speculative microprocessor
Grant 7,694,113 - Torvalds , et al. April 6, 2
2010-04-06
Interpage prologue to protect virtual address mappings
Grant 7,617,088 - Bedichek , et al. November 10, 2
2009-11-10
Switching to original code comparison of modifiable code for translated code validity when frequency of detecting memory overwrites exceeds threshold
Grant 7,404,181 - Banning , et al. July 22, 2
2008-07-22
Switching to original modifiable instruction copy comparison check to validate prior translation when translated sub-area protection exception slows down operation
Grant 7,096,460 - Banning , et al. August 22, 2
2006-08-22
Method for translating instructions in a speculative microprocessor featuring committing state
Grant 6,990,658 - Torvalds , et al. January 24, 2
2006-01-24
Interpage prologue to protect virtual address mappings
Grant 6,845,353 - Bedichek , et al. January 18, 2
2005-01-18
Translation consistency checking for modified target instructions by comparing to original copy
Grant 6,594,821 - Banning , et al. July 15, 2
2003-07-15
Method and apparatus for maintaining context while executing translated instructions
Grant 6,415,379 - Keppel , et al. July 2, 2
2002-07-02
Method and apparatus for correcting errors in computer systems
Grant 5,905,855 - Klaiber , et al. May 18, 1
1999-05-18

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