loadpatents
name:-0.0041179656982422
name:-0.007587194442749
name:-0.00050902366638184
Beard; Douglas R. Patent Filings

Beard; Douglas R.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Beard; Douglas R..The latest application filed is for "size adjusting caches based on processor power mode".

Company Profile
0.13.2
  • Beard; Douglas R. - Austin TX
  • Beard; Douglas R. - Eleva WI
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Size Adjusting Caches By Way
App 20150026406 - McLellan; Edward J. ;   et al.
2015-01-22
Size Adjusting Caches Based On Processor Power Mode
App 20150026407 - McLellan; Edward J. ;   et al.
2015-01-22
Partitioned addressing apparatus for vector/scalar registers
Grant 5,745,721 - Beard , et al. April 28, 1
1998-04-28
Method and apparatus for chaining vector instructions
Grant 5,640,524 - Beard , et al. June 17, 1
1997-06-17
Interleaved memory access system having variable-sized segments logical address spaces and means for dividing/mapping physical address into higher and lower order addresses
Grant 5,561,784 - Chen , et al. October 1, 1
1996-10-01
Vector processor having registers for control by vector resisters
Grant 5,544,337 - Beard , et al. August 6, 1
1996-08-06
Method and apparatus for accessing global registers in a multiprocessor system
Grant 5,524,255 - Beard , et al. June 4, 1
1996-06-04
Scalar/vector processor
Grant 5,430,884 - Beard , et al. July 4, 1
1995-07-04
Method and apparatus for a unified parallel processing architecture
Grant 5,428,803 - Chen , et al. June 27, 1
1995-06-27
Control and maintenance subsystem network for use with a multiprocessor computer system
Grant 5,253,359 - Spix , et al. October 12, 1
1993-10-12
Dedicated centralized signaling mechanism for selectively signaling devices in a multiprocessor system
Grant 5,239,629 - Miller , et al. August 24, 1
1993-08-24
Method and apparatus for non-sequential resource access
Grant 5,208,914 - Wilson , et al. May 4, 1
1993-05-04
Cluster architecture for a highly parallel scalar/vector multiprocessor system
Grant 5,197,130 - Chen , et al. March 23, 1
1993-03-23
Method and apparatus for a special purpose arithmetic boolean unit
Grant 5,175,862 - Phelps , et al. December 29, 1
1992-12-29
Global registers for a multiprocessor system
Grant 5,165,038 - Beard , et al. November 17, 1
1992-11-17

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