loadpatents
name:-0.012470960617065
name:-0.018529891967773
name:-0.0012061595916748
Beach; Eric W. Patent Filings

Beach; Eric W.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Beach; Eric W..The latest application filed is for "longitudinal link trimming and method for increased link resistance and reliability".

Company Profile
0.16.19
  • Beach; Eric W. - Tuscon AZ
  • Beach; Eric W. - Tucson AZ
  • Beach; Eric W - Tucson AZ
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Thin film resistors integrated at two different metal single die
Grant 7,964,919 - Beach , et al. June 21, 2
2011-06-21
Longitudinal link trimming and method for increased link resistance and reliability
App 20100258909 - Hoyt; Eric L. ;   et al.
2010-10-14
Back end thin film capacitor having plates at thin film resistor and first metallization layer levels
Grant 7,807,540 - Beach October 5, 2
2010-10-05
Back End Thin Film Capacitor Having Plates At Thin Film Resistor And First Metallization Layer Levels
App 20100151651 - Beach; Eric W.
2010-06-17
Integration of thin film resistors having different TCRs into single die
Grant 7,704,871 - Beach April 27, 2
2010-04-27
Back end thin film capacitor having both plates of thin film resistor material at single metallization layer
Grant 7,696,603 - Beach April 13, 2
2010-04-13
Rapid thermal anneal equipment and method using sichrome film
Grant 7,455,448 - Jaiswal , et al. November 25, 2
2008-11-25
Nonlinear via arrays for resistors to reduce systematic circuit offsets
Grant 7,449,783 - Beach , et al. November 11, 2
2008-11-11
Thin Film Resistors Integrated At Two Different Metal Interconnect Levels Of Single Die
App 20080272460 - Beach; Eric W. ;   et al.
2008-11-06
Rapid Thermal Anneal Equipment and Method Using Sichrome Film
App 20080248599 - Jaiswal; Rajneesh ;   et al.
2008-10-09
Thin film resistors integrated at two different metal interconnect levels of single die
Grant 7,416,951 - Beach , et al. August 26, 2
2008-08-26
Thin film resistor and dummy fill structure and method to improve stability and reduce self-heating
Grant 7,403,094 - Beach , et al. July 22, 2
2008-07-22
INTEGRATION OF THIN FILM RESISTORS HAVING DIFFERENT TCRs INTO SINGLE DIE
App 20080132056 - Beach; Eric W.
2008-06-05
Integration of thin film resistors having different TCRs into single die
Grant 7,345,573 - Beach March 18, 2
2008-03-18
Back end thin film capacitor having both plates of thin film resistor material at single metallization layer
App 20070170546 - Beach; Eric W.
2007-07-26
Thin film resistor head structure and method for reducing head resistivity variance
Grant 7,208,388 - Beach , et al. April 24, 2
2007-04-24
Thin film resistors integrated at a single metal interconnect level of die
Grant 7,202,533 - Beach , et al. April 10, 2
2007-04-10
Thin Film Resistors Integrated At A Single Metal Interconnect Level Of Die
App 20070069299 - Beach; Eric W. ;   et al.
2007-03-29
Thin film resistors integrated at two different metal interconnect levels of single die
App 20070069334 - Beach; Eric W. ;   et al.
2007-03-29
Integration of thin film resistors having different TCRs into single die
App 20060290462 - Beach; Eric W.
2006-12-28
Nonlinear via arrays for resistors to reduce systematic circuit offsets
App 20060249793 - Beach; Eric W. ;   et al.
2006-11-09
Thin film resistor and dummy fill structure and method to improve stability and reduce self-heating
App 20060238292 - Beach; Eric W. ;   et al.
2006-10-26
Structure and method for minimizing substrate effect on nucleation during sputtering of thin film resistors
App 20060228881 - Beach; Eric W.
2006-10-12
Thin film resistor head structure and method for reducing head resistivity variance
App 20060228879 - Beach; Eric W. ;   et al.
2006-10-12
Providing high precision resistance in an integrated circuit using a thin film resistor of controlled dimension
Grant 7,005,361 - Kwok , et al. February 28, 2
2006-02-28
Rapid thermal anneal equipment and method using sichrome film
App 20060019415 - Jaiswal; Rajneesh ;   et al.
2006-01-26
Method and structure for controlling surface properties of dielectric layers in a thin film component for improved trimming
Grant 6,979,637 - Beach , et al. December 27, 2
2005-12-27
Method and structure for controlling surface properties of dielectric layers in a thin film component for improved trimming
App 20050186751 - Beach, Eric W. ;   et al.
2005-08-25
Method of forming an integrated circuit thin film resistor
Grant 6,872,655 - Mahalingam , et al. March 29, 2
2005-03-29
Providing high precision resistance in an integrated circuit using a thin film resistor of controlled dimension
App 20040227614 - Kwok, Siang Ping ;   et al.
2004-11-18
Method and structure for controlling surface properties of dielectric layers in a thin film component for improved trimming
Grant 6,818,966 - Beach , et al. November 16, 2
2004-11-16
Method of forming an integrated circuit thin film resistor
App 20040152299 - Mahalingam, Pushpa ;   et al.
2004-08-05
Method for thin film resistor integration in dual damascene structure
Grant 6,734,076 - Jaiswal , et al. May 11, 2
2004-05-11
Providing high precision resistance in an integrated circuit using a thin film resistor of controlled dimension
App 20040070048 - Kwok, Siang Ping ;   et al.
2004-04-15
Method and structure for controlling surface properties of dielectric layers in a thin film component for improved trimming
App 20040056326 - Beach, Eric W. ;   et al.
2004-03-25

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed