Baxter; Michael A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Baxter; Michael A..The latest application filed is for "switched processor datapath".

Company Profile

0.21.4

Baxter; Michael A. - Sunnyvale CA
Baxter; Michael A. - Mountain View CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Documentation generation from a computer readable symbolic representation Grant 8,473,911 - Baxter June 25, 2	2013-06-25
Generation of a specification of a network packet processor Grant 7,784,014 - Brebner , et al. August 24, 2	2010-08-24
Integrated circuit for in-system signal monitoring Grant 7,650,248 - Baxter January 19, 2	2010-01-19
Switched processor datapath Grant 7,616,628 - Baxter November 10, 2	2009-11-10
Meta-address architecture for parallel, dynamically reconfigurable computing Grant 7,493,472 - Baxter February 17, 2	2009-02-17
In-system signal analysis using a programmable logic device Grant 7,454,658 - Baxter November 18, 2	2008-11-18
Banyan switched processor datapath Grant 7,146,395 - Baxter December 5, 2	2006-12-05
Switched Processor Datapath App 20060271614 - Baxter; Michael A.	2006-11-30
Reduced instruction set computer architecture with duplication of bit values from an immediate field of an instruction multiple times in a data word Grant 7,114,055 - Baxter September 26, 2	2006-09-26
System and method for dynamic reconfigurable computing using automated translation Grant 7,007,264 - Baxter February 28, 2	2006-02-28
Meta-address architecture for parallel, dynamically reconfigurable computing App 20050268070 - Baxter, Michael A.	2005-12-01
Meta-address architecture for parallel, dynamically reconfigurable computing Grant 6,961,842 - Baxter November 1, 2	2005-11-01
Meta-address architecture for parallel, dynamically reconfigurable computing App 20040107331 - Baxter, Michael A.	2004-06-03
Method and apparatus for phase-lock in a field programmable gate array (FPGA) Grant 6,675,306 - Baxter January 6, 2	2004-01-06
Meta-address architecture for parallel, dynamically reconfigurable computing Grant 6,594,752 - Baxter July 15, 2	2003-07-15
Banyan switched processor datapath App 20030108040 - Baxter, Michael A.	2003-06-12
Dynamically reconfigurable computing using a processing unit having changeable internal hardware organization Grant 6,182,206 - Baxter January 30, 2	2001-01-30
Compiling system and method for partially reconfigurable computing Grant 6,077,315 - Greenbaum , et al. June 20, 2	2000-06-20
System and method for dynamically reconfigurable computing using a processing unit having changeable internal hardware organization Grant 6,058,469 - Baxter May 2, 2	2000-05-02
Automatic capture and processing of facsimile transmissions Grant 6,021,186 - Suzuki , et al. February 1, 2	2000-02-01
Compiling system and method for reconfigurable computing Grant 5,933,642 - Greenbaum , et al. August 3, 1	1999-08-03
Apparatus and method for self-timed algorithmic execution Grant 5,854,918 - Baxter December 29, 1	1998-12-29
System and method for dynamically reconfigurable computing using a processing unit having changeable internal hardware organization Grant 5,794,062 - Baxter August 11, 1	1998-08-11
Dual triggered edge-sensitive asynchrounous flip-flop Grant 4,980,577 - Baxter December 25, 1	1990-12-25

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