Baumgartner; Jason Raymond

Patent Applications and Registrations

Patent applications and USPTO patent grants for Baumgartner; Jason Raymond.The latest application filed is for "detection of unintended dependencies in hardware designs with pseudo-random number generators".

Company Profile

2.68.55

Baumgartner; Jason Raymond - Austin TX
Baumgartner; Jason Raymond - Travis TX
Baumgartner; Jason Raymond - Haifa N/A IL

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Detection Of Unintended Dependencies In Hardware Designs With Pseudo-random Number Generators App 20220100474 - BINGHAM; BRADLEY Donald ; et al.	2022-03-31
Grouping and partitioning of properties for logic verification Grant 10,789,403 - Dureja , et al. September 29, 2	2020-09-29
Method and system for performing invariant-guided abstraction of a logic design Grant 8,850,372 - Baumgartner , et al. September 30, 2	2014-09-30
Method And System For Invariant-guided Abstraction App 20140115548 - BAUMGARTNER; JASON RAYMOND ; et al.	2014-04-24
Model checking of liveness property in a phase abstracted model Grant 8,627,273 - Baumgartner , et al. January 7, 2	2014-01-07
Incremental design reduction via iterative overapproximation and re-encoding strategies Grant 7,930,672 - Baumgartner , et al. April 19, 2	2011-04-19
Enhanced verification through binary decision diagram-based target decomposition Grant 7,921,394 - Baumgartner , et al. April 5, 2	2011-04-05
Reversing the effects of sequential reparameterization on traces Grant 7,917,874 - Baumgartner , et al. March 29, 2	2011-03-29
Method and system for reversing the effects of sequential reparameterization on traces Grant 7,913,205 - Baumgartner , et al. March 22, 2	2011-03-22
Reduction of XOR/XNOR subexpressions in structural design representations Grant 7,913,218 - Baumgartner , et al. March 22, 2	2011-03-22
Enhanced verification through binary decision diagram-based target decomposition using state analysis extraction Grant 7,908,575 - Baumgartner , et al. March 15, 2	2011-03-15
Method and system for reduction of AND/OR subexpressions in structural design representations Grant 7,882,459 - Baumgartner , et al. February 1, 2	2011-02-01
Model Checking Of Liveness Property In A Phase Abstracted Model App 20110022373 - Baumgartner; Jason Raymond ; et al.	2011-01-27
Method and system for reduction of XOR/XNOR subexpressions in structural design representations Grant 7,831,937 - Baumgartner , et al. November 9, 2	2010-11-09
Method and system for reduction of and/or subexpressions in structural design representations Grant 7,823,093 - Baumgartner , et al. October 26, 2	2010-10-26
Computer program product for verification using reachability overapproximation Grant 7,788,615 - Baumgartner , et al. August 31, 2	2010-08-31
Computer program product for extending incremental verification of circuit design to encompass verification restraints Grant 7,779,378 - Baumgartner , et al. August 17, 2	2010-08-17
Method for improved synthesis of binary decision diagrams with inverted edges and quantifiable as well as nonquantifiable variables Grant 7,765,514 - Baumgartner , et al. July 27, 2	2010-07-27
System for verification of digital designs using case-splitting via constrained internal signals Grant 7,752,583 - Baumgartner , et al. July 6, 2	2010-07-06
Method for improved synthesis of binary decision diagrams with inverted edges and quantifiable as well as nonquantifiable variables Grant 7,752,593 - Baumgartner , et al. July 6, 2	2010-07-06
Parametric reduction of sequential design Grant 7,689,943 - Baumgartner , et al. March 30, 2	2010-03-30
Extending incremental verification of circuit design to encompass verification restraints Grant 7,509,605 - Baumgartner , et al. March 24, 2	2009-03-24
Computer Program Product for Extending Incremental Verification of Circuit Design to Encompass Verification Restraints App 20090049416 - Baumgartner; Jason Raymond ; et al.	2009-02-19
System for verification using reachability overapproximation Grant 7,475,370 - Baumgartner , et al. January 6, 2	2009-01-06
Computer program product for verification of digital designs using case-splitting via constrained internal signals Grant 7,458,048 - Baumgartner , et al. November 25, 2	2008-11-25
Method, system and computer program product for improving efficiency in generating high-level coverage data for a circuit-testing scheme Grant 7,454,680 - Farago , et al. November 18, 2	2008-11-18
Using Constraints In Design Verification App 20080256499 - Baumgartner; Jason Raymond ; et al.	2008-10-16
Using constraints in design verification Grant 7,421,669 - Baumgartner , et al. September 2, 2	2008-09-02
Generating multimedia information from text information using customized dictionaries Grant 7,386,450 - Baumgartner , et al. June 10, 2	2008-06-10
System and Program Product for Incremental Design Reduction via Iterative Overapproximation and Re-Encoding Strategies App 20080127002 - Baumgartner; Jason Raymond ; et al.	2008-05-29
Method and system for reduction of and/or subexpressions in structural design representations Grant 7,380,221 - Baumgartner , et al. May 27, 2	2008-05-27
Method and System for Reversing the Effects of Sequential Reparameterization on Traces App 20080109769 - Baumgartner; Jason Raymond ; et al.	2008-05-08
Method and system for parametric reduction of sequential designs App 20080109774 - Baumgartner; Jason Raymond ; et al.	2008-05-08
Method and System for Reversing the Effects of Sequential Reparameterization on Traces App 20080109781 - Baumgartner; Jason Raymond ; et al.	2008-05-08
Method for incremental design reduction via iterative overapproximation and re-encoding strategies Grant 7,370,292 - Baumgartner , et al. May 6, 2	2008-05-06
Method for heuristic preservation of critical inputs during sequential reparameterization Grant 7,370,298 - Baumgartner , et al. May 6, 2	2008-05-06
Method and System for Enhanced Verification Through Structural Target Decomposition App 20080104558 - Baumgartner; Jason Raymond ; et al.	2008-05-01
Method and system for parametric reduction of sequential designs App 20080104560 - Baumgartner; Jason Raymond ; et al.	2008-05-01
Method, system and computer program product for verification of digital designs using case-splitting via constrained internal signals Grant 7,367,001 - Baumgartner , et al. April 29, 2	2008-04-29
Method and system for parametric reduction of sequential designs Grant 7,367,002 - Baumgartner , et al. April 29, 2	2008-04-29
Method and system for reduction of XOR/XNOR subexpressions in structural design representations App 20080092091 - Baumgartner; Jason Raymond ; et al.	2008-04-17
Method and System for Reduction of XOR/XNOR Subexpressions in Structural Design Representations App 20080091386 - Baumgartner; Jason Raymond ; et al.	2008-04-17
Method for Improved Synthesis of Binary Decision Diagrams with Inverted Edges and Quantifiable as Well as Nonquantifiable Variables App 20080092105 - Baumgartner; Jason Raymond ; et al.	2008-04-17
Method for Improved Synthesis of Binary Decision Diagrams with Inverted Edges and Quantifiable as Well as Nonquantifiable Variables App 20080092104 - Baumgartner; Jason Raymond ; et al.	2008-04-17
Method And System For Optimized Automated Case-splitting Via Constraints In A Symbolic Simulation Framework App 20080092096 - BAUMGARTNER; JASON Raymond ; et al.	2008-04-17
Method and system for enchanced verification through binary decision diagram-based target decomposition App 20080086707 - Baumgartner; Jason Raymond ; et al.	2008-04-10
Computer Program Product for Verification of Digital Designs Using Case-Splitting via Constrained Internal Signals App 20080077379 - Baumgartner; Jason Raymond ; et al.	2008-03-27
System for Verification of Digital Designs Using Case-Splitting via Constrained Internal Signals App 20080077381 - Baumgartner; Jason Raymond ; et al.	2008-03-27
Method for improved synthesis of binary decision diagrams with inverted edges and quantifiable as well as nonquantifiable variables Grant 7,350,179 - Baumgartner , et al. March 25, 2	2008-03-25
Method and system for reversing the effects of sequential reparameterization on traces Grant 7,350,166 - Baumgartner , et al. March 25, 2	2008-03-25
Method and system for enhanced verification through structural target decomposition Grant 7,350,169 - Baumgartner , et al. March 25, 2	2008-03-25
Method and System for Reduction of AND/OR Subexpressions in Structural Design Representations App 20080072185 - Baumgartner; Jason Raymond ; et al.	2008-03-20
Method and System for Reduction of AND/OR Subexpressions in Structural Design Representations App 20080072186 - Baumgartner; Jason Raymond ; et al.	2008-03-20
Method For Verification Using Reachability Overapproximation App 20080066031 - Baumgartner; Jason Raymond ; et al.	2008-03-13
Method and system for enhanced verification through binary decision diagram-based target decomposition Grant 7,343,573 - Baumgartner , et al. March 11, 2	2008-03-11
Method and system for reduction of XOR/XNOR subexpressions in structural design representations Grant 7,340,694 - Baumgartner , et al. March 4, 2	2008-03-04
Method and system for optimized automated case-splitting via constraints in a symbolic simulation framework Grant 7,340,704 - Baumgartner , et al. March 4, 2	2008-03-04
Method And System For Enchanced Verification Through Binary Decision Diagram-based Target Decomposition App 20080052648 - Baumgartner; Jason Raymond ; et al.	2008-02-28
Method for Verification Using Reachability Overapproximation App 20080052650 - Baumgartner; Jason Raymond ; et al.	2008-02-28
Method for verification using reachability overapproximation Grant 7,322,017 - Baumgartner , et al. January 22, 2	2008-01-22
Method and system for formal unidirectional bus verification using synthesizing constrained drivers Grant 7,305,636 - Baumgartner , et al. December 4, 2	2007-12-04
Method for preserving constraints during sequential reparameterization Grant 7,299,432 - Baumgartner , et al. November 20, 2	2007-11-20
Method and system for optimized handling of constraints during symbolic simulation Grant 7,290,229 - Baumgartner , et al. October 30, 2	2007-10-30
Method for reconfiguration of random biases in a synthesized design without recompilation Grant 7,284,210 - Baumgartner , et al. October 16, 2	2007-10-16
System and method for engine-controlled case splitting within multiple-engine based verification framework Grant 7,266,795 - Baumgartner , et al. September 4, 2	2007-09-04
Exploiting suspected redundancy for enhanced design verification Grant 7,260,799 - Baumgartner , et al. August 21, 2	2007-08-21
Extending incremental verification of circuit design to encompass verification restraints App 20070136701 - Baumgartner; Jason Raymond ; et al.	2007-06-14
Method for retiming in the presence of verification constraints Grant 7,203,915 - Baumgartner , et al. April 10, 2	2007-04-10
Using constraints in design verification App 20070074136 - Baumgartner; Jason Raymond ; et al.	2007-03-29
Method and system for optimized automated case-splitting via constraints in a symbolic simulation framework App 20060294481 - Baumgartner; Jason Raymond ; et al.	2006-12-28
Method and system for enhanced verification through binary decision diagram-based target decomposition App 20060277508 - Baumgartner; Jason Raymond ; et al.	2006-12-07
Method and system for enhanced verification through structural target decomposition App 20060277507 - Baumgartner; Jason Raymond ; et al.	2006-12-07
Method for improved synthesis of binary decision diagrams with inverted edges and quantifiable as well as nonquantifiable variables App 20060248483 - Baumgartner; Jason Raymond ; et al.	2006-11-02
Method and system for parametric reduction of sequential designs App 20060248494 - Baumgartner; Jason Raymond ; et al.	2006-11-02
Method for preserving constraints during sequential reparameterization App 20060248484 - Baumgartner; Jason Raymond ; et al.	2006-11-02
Method for heuristic preservation of critical inputs during sequential reparameterization App 20060248482 - Baumgartner; Jason Raymond ; et al.	2006-11-02
Method and system for reversing the effects of sequential reparameterization on traces App 20060248481 - Baumgartner; Jason Raymond ; et al.	2006-11-02
Method and system for reduction of and/or subexpressions in structural design representations App 20060230367 - Baumgartner; Jason Raymond ; et al.	2006-10-12
System and method for engine-controlled case splitting within a multiple-engine based verification framework App 20060230370 - Baumgartner; Jason Raymond ; et al.	2006-10-12
Method and system for reduction of XOR/XNOR subexpressions in structural design representations App 20060230366 - Baumgartner; Jason Raymond ; et al.	2006-10-12
Method for retiming in the presence of verification constraints App 20060206842 - Baumgartner; Jason Raymond ; et al.	2006-09-14
Method for reconfiguration of random biases in a synthesized design without recompilation App 20060190867 - Baumgartner; Jason Raymond ; et al.	2006-08-24
Method and system for optimized handling of constraints during symbolic simulation App 20060190868 - Baumgartner; Jason Raymond ; et al.	2006-08-24
Exploiting suspected redundancy for enhanced design verification App 20060190873 - Baumgartner; Jason Raymond ; et al.	2006-08-24
Method and system for formal unidirectional bus verification App 20060190874 - Baumgartner; Jason Raymond ; et al.	2006-08-24
Design verification using sequential and combinational transformations App 20060190869 - Baumgartner; Jason Raymond ; et al.	2006-08-24
Incremental, assertion-based design verification Grant 7,093,218 - Baumgartner , et al. August 15, 2	2006-08-15
Method for incremental design reduction via iterative overapproximation and re-encoding strategies App 20060129952 - Baumgartner; Jason Raymond ; et al.	2006-06-15
Method, system and computer program product for verification of digital designs using case-splitting via constrained internal signals App 20060122817 - Baumgartner; Jason Raymond ; et al.	2006-06-08
Method and system of audio file searching Grant 7,010,485 - Baumgartner , et al. March 7, 2	2006-03-07
Method, system and computer program product for improving efficiency in generating high-level coverage data for a circuit-testing scheme App 20060025980 - Farago; Steven Robert ; et al.	2006-02-02
Use of time step information in a design verification system Grant 6,993,734 - Baumgartner , et al. January 31, 2	2006-01-31
Integrated design verification and design simplification system Grant 6,983,435 - Baumgartner , et al. January 3, 2	2006-01-03
Audio transmission system with reduced bandwidth consumption Grant 6,980,957 - Baumgartner , et al. December 27, 2	2005-12-27
Incremental, assertion-based design verification App 20050188337 - Baumgartner, Jason Raymond ; et al.	2005-08-25
Integrated design verification and design simplification system App 20040261043 - Baumgartner, Jason Raymond ; et al.	2004-12-23
Fully exhibiting asynchronous behavior in a logic network simulation Grant 6,816,826 - Andersen , et al. November 9, 2	2004-11-09
Method and system for optimizing systems with enhanced debugging information Grant 6,795,963 - Andersen , et al. September 21, 2	2004-09-21
Use of time step information in a design verification system App 20040168137 - Baumgartner, Jason Raymond ; et al.	2004-08-26
Apparatus and method for automated use of phase abstraction for enhanced verification of circuit designs Grant 6,763,505 - Baumgartner , et al. July 13, 2	2004-07-13
Method and system for enhanced design validation through trace tailoring Grant 6,751,582 - Andersen , et al. June 15, 2	2004-06-15
Apparatus and method for removing effects of phase abstraction from a phase abstracted trace Grant 6,748,573 - Baumgartner , et al. June 8, 2	2004-06-08
Apparatus and method for representing gated-clock latches for phase abstraction Grant 6,745,377 - Baumgartner , et al. June 1, 2	2004-06-01
Method and system for formal characterization of average performance Grant 6,738,955 - Andersen , et al. May 18, 2	2004-05-18
Framework for multiple-engine based verification tools for integrated circuits Grant 6,698,003 - Baumgartner , et al. February 24, 2	2004-02-24
Dictionary based video compression Grant 6,678,417 - Baumgartner , et al. January 13, 2	2004-01-13
Apparatus and method for representing gated-clock latches for phase abstraction App 20030192017 - Baumgartner, Jason Raymond ; et al.	2003-10-09
Apparatus and method for automated use of phase abstraction for enhanced verification of circuit designs App 20030192018 - Baumgartner, Jason Raymond ; et al.	2003-10-09
Apparatus and method for removing effects of phase abstraction from a phase abstracted trace App 20030192016 - Baumgartner, Jason Raymond ; et al.	2003-10-09
Framework for multiple-engine based verification tools for integrated circuits App 20030110455 - Baumgartner, Jason Raymond ; et al.	2003-06-12
Method, apparatus, and program for multiple clock domain partitioning through retiming Grant 6,567,962 - Baumgartner , et al. May 20, 2	2003-05-20
Digital circuit verification Grant 6,553,514 - Baumgartner , et al. April 22, 2	2003-04-22
High performance voice transformation apparatus and method Grant 6,463,412 - Baumgartner , et al. October 8, 2	2002-10-08
Digital circuit verification with automated specification enumeration Grant 6,449,752 - Baumgartner , et al. September 10, 2	2002-09-10
Method and system for compressing data which allows access to data without full uncompression Grant 6,438,556 - Malik , et al. August 20, 2	2002-08-20
Method and system for formal characterization of average performance App 20020099982 - Andersen, Flemming ; et al.	2002-07-25
Method, apparatus, and program for multiple clock domain partitioning through retiming App 20020066065 - Baumgartner, Jason Raymond ; et al.	2002-05-30
Reduction of arbitrary L1-L2 circuits for enhanced verification Grant 6,321,184 - Baumgartner , et al. November 20, 2	2001-11-20
Method and system for compressing a state table that allows use of the state table without full uncompression Grant 6,246,349 - Malik , et al. June 12, 2	2001-06-12
Method and system for compressing files utilizing a dictionary array Grant 6,247,015 - Baumgartner , et al. June 12, 2	2001-06-12
Method and system for error detection in test units utilizing pseudo-random data Grant 6,134,684 - Baumgartner , et al. October 17, 2	2000-10-17
Method for automatically generating behavioral environment for model checking Grant 6,074,426 - Baumgartner , et al. June 13, 2	2000-06-13