loadpatents
name:-0.0047211647033691
name:-0.04332709312439
name:-0.0005040168762207
Bauman; Mitchell A Patent Filings

Bauman; Mitchell A

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bauman; Mitchell A.The latest application filed is for "operand and limits optimization for binary translation system".

Company Profile
0.38.6
  • Bauman; Mitchell A - Circle Pines MN
  • Bauman; Mitchell A. - Circle Pines MN
  • Bauman; Mitchell A. - US
  • Bauman; Mitchell A. - Circle Pine MN
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Operand and limits optimization for binary translation system
Grant 9,021,454 - Yohn , et al. April 28, 2
2015-04-28
Operand And Limits Optimization For Binary Translation System
App 20140130026 - Yohn; Judge William ;   et al.
2014-05-08
Systems And Methods For Debugging Just-in-time Static Translation In An Emulated System
App 20130132063 - Rieschl; Michael J. ;   et al.
2013-05-23
Just-in-time Static Translation System For Emulated Computing Environments
App 20130132061 - Rieschl; Michael J. ;   et al.
2013-05-23
Familial correction with non-familial double bit error detection
Grant 7,634,709 - Bauman , et al. December 15, 2
2009-12-15
System and method for performing error recovery in a data processing system having multiple processing partitions
Grant 7,343,515 - Gilbertson , et al. March 11, 2
2008-03-11
Apparatus and method for analyzing performance of a data processing system
Grant 7,277,825 - Orfali , et al. October 2, 2
2007-10-02
Programmable system and method for accessing a shared memory
Grant 7,260,677 - Vartti , et al. August 21, 2
2007-08-21
System and method for providing speculative ownership of cached data based on history tracking
Grant 7,213,109 - Bauman , et al. May 1, 2
2007-05-01
System and method for testing and initializing directory store memory
Grant 7,167,955 - Neils , et al. January 23, 2
2007-01-23
System and method for performing conflict resolution and flow control in a multiprocessor system
Grant 7,047,322 - Bauman , et al. May 16, 2
2006-05-16
System and method for accelerating read requests within a multiprocessor system
Grant 7,032,079 - Bauman , et al. April 18, 2
2006-04-18
System and method for accelerating ownership within a directory-based memory system
Grant 6,981,106 - Bauman , et al. December 27, 2
2005-12-27
Data acceleration mechanism for a multiprocessor shared memory system
Grant 6,973,548 - Vartti , et al. December 6, 2
2005-12-06
Method and apparatus for parallel store-in second level caching
Grant 6,868,482 - Mackenthun , et al. March 15, 2
2005-03-15
High-performance modular memory system with crossbar connections
Grant 6,799,252 - Bauman September 28, 2
2004-09-28
Leaky cache mechanism
Grant 6,728,835 - Bauman , et al. April 27, 2
2004-04-27
System and method for fault handling and recovery in a multi-processing system having hardware resources shared between multiple partitions
Grant 6,594,785 - Gilbertson , et al. July 15, 2
2003-07-15
Familial correction with non-familial double bit error detection
App 20030070133 - Bauman, Mitchell A. ;   et al.
2003-04-10
High-performance modular memory system with crossbar connections
Grant 6,480,927 - Bauman November 12, 2
2002-11-12
Cache-level return data by-pass system for a hierarchical memory
Grant 6,477,620 - Bauman , et al. November 5, 2
2002-11-05
System and method for providing the speculative return of cached data within a hierarchical memory system
Grant 6,457,101 - Bauman , et al. September 24, 2
2002-09-24
Method and apparatus for efficiently generating test input for a logic simulator
Grant 6,453,276 - Bauman September 17, 2
2002-09-17
System for reducing the number of requests presented to a main memory in a memory storage system employing a directory-based caching scheme
Grant 6,434,641 - Haupt , et al. August 13, 2
2002-08-13
High-speed memory storage unit for a multiprocessor system having integrated directory and data storage subsystems
Grant 6,415,364 - Bauman , et al. July 2, 2
2002-07-02
System and method for performing parallel initialization and testing of multiple memory banks and interfaces in a shared memory module
Grant 6,381,715 - Bauman , et al. April 30, 2
2002-04-30
Programmable address translation system
Grant 6,356,991 - Bauman , et al. March 12, 2
2002-03-12
Method of and apparatus for serial dynamic system partitioning
Grant 6,279,098 - Bauman , et al. August 21, 2
2001-08-21
Test driver for use in validating a circuit design
Grant 6,226,716 - Bauman , et al. May 1, 2
2001-05-01
Source synchronous transfer scheme for a high speed memory interface
Grant 6,199,135 - Maahs , et al. March 6, 2
2001-03-06
System and method for increasing data transfer throughput for cache purge transactions using multiple data response indicators to maintain processor consistency
Grant 6,189,078 - Bauman , et al. February 13, 2
2001-02-13
System and method for bypassing supervisory memory intervention for data transfers between devices having local memories
Grant 6,167,489 - Bauman , et al. December 26, 2
2000-12-26
Method of and apparatus for store-in second level cache flush
Grant 6,122,711 - Mackenthun , et al. September 19, 2
2000-09-19
Interface queue with bypassing capability for main storage unit
Grant 6,055,607 - Bauman , et al. April 25, 2
2000-04-25
Computer system including plural caches and utilizing access history or patterns to determine data ownership for efficient handling of software locks
Grant 6,052,760 - Bauman , et al. April 18, 2
2000-04-18
System and method for providing speculative arbitration for transferring data
Grant 6,049,845 - Bauman , et al. April 11, 2
2000-04-11
Message flow protocol for avoiding deadlocks
Grant 6,014,709 - Gulick , et al. January 11, 2
2000-01-11
Selectable two-way, four-way double cache interleave scheme
Grant 5,946,710 - Bauman , et al. August 31, 1
1999-08-31
Multi-processor data processing system with multiple second level caches mapable to all of addressable memory
Grant 5,875,462 - Bauman , et al. February 23, 1
1999-02-23
Second level cache having instruction cache parity error control
Grant 5,875,201 - Bauman , et al. February 23, 1
1999-02-23
Memory queue with adjustable priority and conflict detection
Grant 5,832,304 - Bauman , et al. November 3, 1
1998-11-03
Multi-processor data processing system with control for granting multiple storage locks in parallel and parallel lock priority and second level cache priority queues
Grant 5,678,026 - Vartti , et al. October 14, 1
1997-10-14

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