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Repurposing data lane as clock lane by migrating to reduced speed link operation
Grant 8,717,882 - Iyer , et al. May 6, 2 | 2014-05-06 |
Dynamically routing data responses directly to requesting processor core
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Dynamically Routing Data Responses Directly To Requesting Processor Core
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Repurposing Data Lane As Clock Lane By Migrating To Reduced Speed Link Operation
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Methods and apparatuses to effect a variable-width link
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Mechanism for synchronizing multiple skewed source-synchronous data channels with automatic initialization feature
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Mechanism for synchronizing multiple skewed source-synchronous data channels with automatic initialization feature
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