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name:-0.0060770511627197
name:-0.00038003921508789
Bauch; Lothar Patent Filings

Bauch; Lothar

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bauch; Lothar.The latest application filed is for "method and system for determining overlap process windows in semiconductors by inspection techniques".

Company Profile
0.7.11
  • Bauch; Lothar - Dresden DE
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method and system for determining overlap process windows in semiconductors by inspection techniques
Grant 9,099,353 - Bauch August 4, 2
2015-08-04
Method And System For Determining Overlap Process Windows In Semiconductors By Inspection Techniques
App 20150140695 - Bauch; Lothar
2015-05-21
Method and system for determining overlap process windows in semiconductors by inspection techniques
Grant 8,940,555 - Bauch January 27, 2
2015-01-27
Method And System For Determining Overlap Process Windows In Semiconductors By Inspection Techniques
App 20140065734 - Bauch; Lothar
2014-03-06
Photolithographic mask having half tone main features and perpendicular half tone assist features
Grant 7,465,522 - Bauch , et al. December 16, 2
2008-12-16
Hard Mask Layer Stack And A Method Of Patterning
App 20070243707 - Manger; Dirk ;   et al.
2007-10-18
Device and a method and mask for forming a device
App 20070218627 - Lattard; Ludovic ;   et al.
2007-09-20
Method for transferring structures from a photomask into a photoresist layer
App 20060257794 - Voelkel; Lars ;   et al.
2006-11-16
Method for detecting positioning errors of circuit patterns during the transfer by means of a mask into layers of a substrate of a semiconductor wafer
Grant 7,084,962 - Bauch , et al. August 1, 2
2006-08-01
Photolithographic mask
Grant 7,078,133 - Bauch , et al. July 18, 2
2006-07-18
Lithography mask and lithography system for direction-dependent exposure
App 20050153216 - Crell, Christian ;   et al.
2005-07-14
Method for detecting positioning errors of circuit patterns during the transfer by means of a mask into layers of a substrate of a semiconductor wafer
App 20050068515 - Bauch, Lothar ;   et al.
2005-03-31
Photolithographic mask
App 20040256356 - Bauch, Lothar ;   et al.
2004-12-23
Stacked via with specially designed landing pad for integrated semiconductor structures
Grant 6,737,748 - Bauch , et al. May 18, 2
2004-05-18
Photolithographic mask
App 20030152846 - Bauch, Lothar ;   et al.
2003-08-14
Stacked via with specially designed landing pad for integrated semiconductor structures
App 20020117759 - Bauch, Lothar ;   et al.
2002-08-29

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