BATRA; Shubneesh

Patent Applications and Registrations

Patent applications and USPTO patent grants for BATRA; Shubneesh.The latest application filed is for "methods and apparatus for processing a substrate".

Company Profile

0.51.32

BATRA; Shubneesh - Boise ID

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods And Apparatus For Processing A Substrate App 20220208996 - BATRA; Shubneesh ; et al.	2022-06-30
Method of forming a non-volatile electron storage memory and the resulting device Grant 8,541,821 - Batra , et al. September 24, 2	2013-09-24
Method Of Forming A Non-volatile Electron Storage Memory And The Resulting Device App 20120028429 - Batra; Shubneesh ; et al.	2012-02-02
Multiple-depth STI trenches in integrated circuit fabrication Grant 7,939,394 - Batra , et al. May 10, 2	2011-05-10
Method of Forming a Thin Film Transistor App 20110024762 - Sandhu; Gurtej S. ; et al.	2011-02-03
Method of forming a thin film transistor Grant 7,825,414 - Sandhu , et al. November 2, 2	2010-11-02
Method of Forming a Thin Film Transistor App 20090302322 - Sandhu; Gurtej S. ; et al.	2009-12-10
Thin film transistors and semiconductor constructions Grant 7,566,907 - Sandhu , et al. July 28, 2	2009-07-28
Method of Forming a Thin Film Transistor App 20090047776 - Sandhu; Gurtej S. ; et al.	2009-02-19
Thin film transistors and semiconductor constructions Grant 7,452,760 - Sandhu , et al. November 18, 2	2008-11-18
Transistors And Semiconductor Constructions App 20080237601 - Sandhu; Gurtej S. ; et al.	2008-10-02
Multiple-depth Sti Trenches In Integrated Circuit Fabrication App 20080176378 - Batra; Shubneesh ; et al.	2008-07-24
Thin film transistors and semiconductor constructions Grant 7,385,222 - Sandhu , et al. June 10, 2	2008-06-10
Multiple-depth STI trenches in integrated circuit fabrication Grant 7,354,812 - Batra , et al. April 8, 2	2008-04-08
Vertical twist scheme for high-density DRAMs Grant 7,259,464 - Batra August 21, 2	2007-08-21
Thin film transistors and semiconductor constructions App 20070102705 - Sandhu; Gurtej S. ; et al.	2007-05-10
Vertical Twist Scheme for High Density DRAMs App 20070050743 - Batra; Shubneesh	2007-03-01
Method and structures for reduced parasitic capacitance in integrated circuit metallizations Grant 7,160,795 - Batra , et al. January 9, 2	2007-01-09
Antifuse structure and method of use Grant 7,071,534 - Marr , et al. July 4, 2	2006-07-04
Methods of forming polished material and methods of forming isolation regions Grant 7,041,547 - Batra , et al. May 9, 2	2006-05-09
Method of forming a non-volatile electron storage memory and the resulting device App 20060081911 - Batra; Shubneesh ; et al.	2006-04-20
Multiple-depth STI trenches in integrated circuit fabrication App 20060043455 - Batra; Shubneesh ; et al.	2006-03-02
Method of forming a non-volatile electron storage memory and the resulting device Grant 7,005,697 - Batra , et al. February 28, 2	2006-02-28
Thin film transistors and semiconductor constructions App 20050156240 - Sandhu, Gurtej S. ; et al.	2005-07-21
Methods of forming polished material and methods of forming isolation regions App 20050136615 - Batra, Shubneesh ; et al.	2005-06-23
Method and structures for reduced parasitic capacitance in integrated circuit metallizations Grant 6,909,196 - Batra , et al. June 21, 2	2005-06-21
Low temperature reflow method for filling high aspect ratio contacts Grant 6,903,014 - Batra , et al. June 7, 2	2005-06-07
Method of forming a thin film transistor Grant 6,890,842 - Sandhu , et al. May 10, 2	2005-05-10
Antifuse structure and method of use App 20050029622 - Marr, Kenneth W. ; et al.	2005-02-10
Methods of forming polished material and methods of forming isolation regions Grant 6,849,493 - Batra , et al. February 1, 2	2005-02-01
Antifuse structure and method of use Grant 6,836,000 - Marr , et al. December 28, 2	2004-12-28
High output high efficiency low voltage charge pump Grant 6,833,752 - Merritt , et al. December 21, 2	2004-12-21
Method Of Storing A Temperature Threshold In An Integrated Circuit, Method Of Modifying Operation Of Dynamic Random Access Memory In Response To Temperature, Programmable Temperature Sensing Circuit And Memory Integrated Circuit Grant 6,778,453 - Cooper , et al. August 17, 2	2004-08-17
Methods of forming polished material and methods of forming isolation regions App 20040058544 - Batra, Shubneesh ; et al.	2004-03-25
Method and structures for reduced parasitic capacitance in integrated circuit metallizatons App 20030235018 - Batra, Shubneesh ; et al.	2003-12-25
Method of forming a non-volatile electron storage memory and the resulting device App 20030235064 - Batra, Shubneesh ; et al.	2003-12-25
Method and structures for reduced parasitic capacitance in integrated circuit metallizations App 20030234448 - Batra, Shubneesh ; et al.	2003-12-25
Methods of forming polished material and methods of forming isolation regions Grant 6,627,492 - Batra , et al. September 30, 2	2003-09-30
Methods of storing a temperature in an integrated circuit, method of modifying operation of dynamic random access memory in response to temperature, programmable temperature sensing circuit and memory integrated circuit App 20030174559 - Cooper, Christopher B. ; et al.	2003-09-18
Method of fabricating conductive straps to interconnect contacts to corresponding digit lines by employing an angled sidewall implant and semiconductor devices fabricated thereby Grant 6,600,191 - Lowrey , et al. July 29, 2	2003-07-29
Stepped photoresist profile and opening formed using the profile Grant 6,577,010 - Batra , et al. June 10, 2	2003-06-10
Method of anti-fuse repair Grant 6,515,931 - Marr , et al. February 4, 2	2003-02-04
Laser ablative removal of photoresist Grant 6,495,468 - Sandhu , et al. December 17, 2	2002-12-17
Method for reliably shutting off oscillator pulses to a charge-pump Grant 6,490,220 - Merritt , et al. December 3, 2	2002-12-03
Method of fabricating conductive straps to interconnect contacts to corresponding digit lines by employing an angled sidewall implant and semiconductor devices fabricated thereby App 20020121704 - Lowrey, Tyler A. ; et al.	2002-09-05
Stepped photoresist profile and opening formed using the profile App 20020111030 - Batra, Shubneesh ; et al.	2002-08-15
Methods of forming a field effect transistor gate construction Grant 6,417,085 - Batra , et al. July 9, 2	2002-07-09
Semiconductor processing method of forming openings in a material Grant 6,333,256 - Sandhu , et al. December 25, 2	2001-12-25
Method of forming a thin film transistor App 20010044173 - Sandhu, Gurtej S. ; et al.	2001-11-22
Bottom-gated thin film transistors comprising germanium in a channel region Grant 6,320,202 - Banerjee , et al. November 20, 2	2001-11-20
Low temperature reflow method for filling high aspect ratio contacts App 20010041439 - Batra, Shubneesh ; et al.	2001-11-15
Semiconductor Processing Methods Of Forming Openings In A Material App 20010039112 - SANDHU, GURTEJ S. ; et al.	2001-11-08
High output high efficiency low voltage charge pump App 20010035787 - Merritt, Todd A. ; et al.	2001-11-01
Method of fabricating conductive straps to interconnect contacts to corresponding digit lines by employing an angled sidewall implant and semiconductor devices fabricated thereby App 20010028092 - Lowrey, Tyler A. ; et al.	2001-10-11
Antifuse method to repair columns in a prefetched output memory architecture Grant 6,301,164 - Manning , et al. October 9, 2	2001-10-09
Method of anti-fuse repair App 20010026494 - Marr, Kenneth W. ; et al.	2001-10-04
Methods of forming polished material and methods of forming isolation regions App 20010021568 - Batra, Shubneesh ; et al.	2001-09-13
Method of forming a thin film transistor App 20010014518 - Sandhu, Gurtej S. ; et al.	2001-08-16
Method for storing a temperature threshold in an integrated circuit, method for storing a temperature threshold in a dynaic random access memory, method of modifying dynamic random access memory operation in response to temperature, programmable temperature sensing circuit and memory integrated circ App 20010009528 - Cooper, Christopher B. ; et al.	2001-07-26
Semiconductor processing methods of forming openings to devices and substrates, exposing material from which photoresist cannot be substantially selectively removed, forming a series of conductive lines, and removing photoresist from substrates App 20010002337 - Sandhu, Gurtej S. ; et al.	2001-05-31
Method of storing a temperature threshold in an integrated circuit, method of modifying operation of dynamic random access memory in response to temperature, programmable temperature sensing circuit and memory integrated circuit Grant 6,233,190 - Cooper , et al. May 15, 2	2001-05-15
Thin film transistors and method of forming thin film transistors App 20010000756 - Batra, Shubneesh ; et al.	2001-05-03
Thin film transistors and method of forming thin film transistors Grant 6,214,652 - Batra , et al. April 10, 2	2001-04-10
Methods of forming integrated circuitry and integrated circuitry Grant 6,215,151 - Wu , et al. April 10, 2	2001-04-10
Laser ablative removal of photoresist Grant 6,211,093 - Sandhu , et al. April 3, 2	2001-04-03
Method for semiconductor device isolation using oxygen and nitrogen ion implantations to reduce lateral encroachment Grant 6,127,242 - Batra , et al. October 3, 2	2000-10-03
Field effect transistors and method of forming field effect transistors Grant 6,114,735 - Batra , et al. September 5, 2	2000-09-05
Process for improving roughness of conductive layer Grant 6,060,355 - Batra , et al. May 9, 2	2000-05-09
Thin film transistor and method of forming thin film transistors Grant 6,017,782 - Batra , et al. January 25, 2	2000-01-25
Method of forming a thin film transistor Grant 6,001,675 - Sandhu , et al. December 14, 1	1999-12-14
Method of anti-fuse repair Grant 5,978,248 - Marr , et al. November 2, 1	1999-11-02
Method of forming thin film transistors Grant 5,904,513 - Batra , et al. May 18, 1	1999-05-18
Low temperature reflow method for filling high aspect ratio contacts Grant 5,789,317 - Batra , et al. August 4, 1	1998-08-04
Process for improving roughness of conductive layer Grant 5,770,500 - Batra , et al. June 23, 1	1998-06-23
Method of forming a thin film transistor Grant 5,753,543 - Sandhu , et al. May 19, 1	1998-05-19
SRAM cell employing substantially vertically elongated pull-up resistors and methods of making, and resistor constructions and methods of making Grant 5,744,846 - Batra , et al. April 28, 1	1998-04-28
Method of anti-fuse repair Grant 5,742,555 - Marr , et al. April 21, 1	1998-04-21
SRAM cell employing substantially vertically elongated pull-up resistors and methods of making, and resistor constructions and methods of making Grant 5,683,930 - Batra , et al. November 4, 1	1997-11-04
Thin film transistors and method of promoting large crystal grain size in the formation of polycrystalline silicon alloy thin films Grant 5,665,981 - Banerjee , et al. September 9, 1	1997-09-09
Thin film transistor with large grain size DRW offset region and small grain size source and drain and channel regions Grant 5,548,132 - Batra , et al. August 20, 1	1996-08-20
Method of forming improved contacts from polysilicon to silicon or other polysilicon layers Grant 5,541,137 - Manning , et al. July 30, 1	1996-07-30
Method of forming a self-aligned low density drain inverted thin film transistor Grant 5,385,854 - Batra , et al. January 31, 1	1995-01-31