loadpatents
name:-0.012258052825928
name:-0.0086259841918945
name:-0.00084280967712402
Batchelor; William E. Patent Filings

Batchelor; William E.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Batchelor; William E..The latest application filed is for "feol/beol heterogeneous integration".

Company Profile
2.8.8
  • Batchelor; William E. - Raleigh NC
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Gate driver for depletion-mode transistors
Grant 10,511,303 - Duduman , et al. Dec
2019-12-17
Feol/Beol Heterogeneous Integration
App 20190198442 - Batchelor; William E.
2019-06-27
Gate Driver for Depletion-Mode Transistors
App 20180041203 - Duduman; Bogdan M. ;   et al.
2018-02-08
Gate driver for depletion-mode transistors
Grant 9,774,322 - Duduman , et al. September 26, 2
2017-09-26
Electronic structures including conductive layers comprising copper and having a thickness of at least 0.5 micrometers
Grant 8,294,269 - Nair , et al. October 23, 2
2012-10-23
Electronic Structures Including Conductive Layers Comprising Copper and Having a Thickness of at Least 0.5 Micrometers
App 20110084392 - Nair; Krishna K. ;   et al.
2011-04-14
Methods of forming electronic structures including conductive shunt layers and related structures
Grant 7,879,715 - Nair , et al. February 1, 2
2011-02-01
Non-Circular via holes for bumping pads and related structures
Grant 7,531,898 - Batchelor , et al. May 12, 2
2009-05-12
Methods Of Forming Electronic Structures Including Conductive Shunt Layers And Related Structures
App 20080026560 - Nair; Krishna K. ;   et al.
2008-01-31
Methods of forming electronic structures including conductive shunt layers and related structures
Grant 7,297,631 - Nair , et al. November 20, 2
2007-11-20
Non-circular via holes for bumping pads and related structures
App 20060076679 - Batchelor; William E. ;   et al.
2006-04-13
Methods of forming electronic structures including conductive shunt layers and related structures
App 20060009023 - Nair; Krishna K. ;   et al.
2006-01-12
Electronic structures including conductive shunt layers
Grant 6,960,828 - Nair , et al. November 1, 2
2005-11-01
Methods of forming electronic structures including conductive shunt layers and related structures
App 20040053483 - Nair, Krishna K. ;   et al.
2004-03-18
Systems and methods for wirelessly projecting power using in-phase current loops and for identifying radio frequency identification tags that are simultaneously interrogated
App 20020084940 - Dettloff, Wayne D. ;   et al.
2002-07-04
Systems and methods for wirelessly projecting power using in-phase current loops
Grant 6,388,628 - Dettloff , et al. May 14, 2
2002-05-14

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