Batchelor; Jeffrey S.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Batchelor; Jeffrey S..The latest application filed is for "cascaded pll for reducing low-frequency drift in holdover mode".

Company Profile

0.5.4

Batchelor; Jeffrey S. - Austin TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Cascaded Pll For Reducing Low-frequency Drift In Holdover Mode App 20140225653 - Hara; Susumu ; et al.	2014-08-14
Cascaded PLL for reducing low-frequency drift in holdover mode Grant 8,791,734 - Hara , et al. July 29, 2	2014-07-29
Calibrating a phase detector and analog-to-digital converter offset and gain Grant 8,130,888 - Eldredge , et al. March 6, 2	2012-03-06
Variable sense level for fuse-based non-volatile memory Grant 7,742,352 - Hara , et al. June 22, 2	2010-06-22
Calibrating A Phase Detector And Analog-To-Digital Converter Offset And Gain App 20100008459 - Eldredge; Adam B. ; et al.	2010-01-14
Calibrating a phase detector and analog-to-digital converter offset and gain Grant 7,609,798 - Eldredge , et al. October 27, 2	2009-10-27
Expanded pull range for a voltage controlled clock synthesizer Grant 7,342,460 - Batchelor , et al. March 11, 2	2008-03-11
Expanded Pull Range For A Voltage Controlled Clock Synthesizer App 20070176691 - Batchelor; Jeffrey S. ; et al.	2007-08-02
Calibrating a phase detector and analog-to-digital converter offset and gain App 20060140319 - Eldredge; Adam B. ; et al.	2006-06-29

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