loadpatents
name:-0.16358208656311
name:-0.13309383392334
name:-0.0077009201049805
Bartoli; Simone Patent Filings

Bartoli; Simone

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bartoli; Simone.The latest application filed is for "memory device, memory address decoder, system, and related method for memory attack detection".

Company Profile
1.39.40
  • Bartoli; Simone - lecco IT
  • Bartoli; Simone - Mandello del lario IT
  • Bartoli; Simone - Mandello del Lario LC
  • Bartoli; Simone - Cambiago IT
  • Bartoli; Simone - Cambiago MI
  • Bartoli; Simone - Via Monte Bianco IT
  • Bartoli; Simone - Milan IT
  • Bartoli; Simone - Carbiago IT
  • Bartoli; Simone - Pisa IT
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Memory device, memory address decoder, system, and related method for memory attack detection
Grant 11,443,820 - Bedarida , et al. September 13, 2
2022-09-13
Memory Device, Memory Address Decoder, System, And Related Method For Memory Attack Detection
App 20190228831 - Bedarida; Lorenzo ;   et al.
2019-07-25
Erase techniques and circuits therefor for non-volatile memory devices
Grant 9,349,480 - Ferragina , et al. May 24, 2
2016-05-24
Method of programming selection transistors for NAND flash memory
Grant 8,995,192 - Khouri , et al. March 31, 2
2015-03-31
Erase Techniques and Circuits Therefor for Non-Volatile Memory Devices
App 20140293707 - Ferragina; Vincenzo ;   et al.
2014-10-02
Erase techniques and circuits therefor for non-volatile memory devices
Grant 8,705,283 - Ferragina , et al. April 22, 2
2014-04-22
Method and circuit to discharge bit lines after an erase pulse
Grant 8,644,079 - Passerini , et al. February 4, 2
2014-02-04
Memory device in particular extra array configured therein for configuration and redundancy information
Grant 8,599,615 - Bartoli , et al. December 3, 2
2013-12-03
Method Of Programming Selection Transistors For Nand Flash Memory
App 20130258780 - Khouri; Osama ;   et al.
2013-10-03
Semiconductor Device Including Voltage Converter Circuit, And Method Of Making The Semiconductor Device
App 20130193590 - Bartoli; Simone ;   et al.
2013-08-01
Memory Device In Particular Extra Array Configured Therein For Configuration And Redundancy Information
App 20130094295 - Bartoli; Simone ;   et al.
2013-04-18
Erase Techniques And Circuits Therefor For Non-volatile Memory Devices
App 20130016564 - Ferragina; Vincenzo ;   et al.
2013-01-17
Method And Circuit To Discharge Bit Lines After An Erase Pulse
App 20120287723 - Passerini; Marco ;   et al.
2012-11-15
Sense amplifier
Grant 7,920,436 - Bedarida , et al. April 5, 2
2011-04-05
Compensated current offset in a sensing circuit
Grant 7,782,695 - Bedarida , et al. August 24, 2
2010-08-24
Flexible, low cost apparatus and method to introduce and check algorithm modifications in a non-volatile memory
Grant 7,769,943 - Surico , et al. August 3, 2
2010-08-03
Sense Amplifier
App 20100149896 - Bedarida; Lorenzo ;   et al.
2010-06-17
Non-volatile memory array architecture with joined word lines
Grant 7,684,245 - Schumann , et al. March 23, 2
2010-03-23
Sense architecture
Grant 7,561,485 - Pelli , et al. July 14, 2
2009-07-14
Implementation of column redundancy for a flash memory with a high write parallelism
Grant 7,551,498 - Bartoli , et al. June 23, 2
2009-06-23
Non-volatile Memory Array Architecture With Joined Word Lines
App 20090109754 - Schumann; Steve ;   et al.
2009-04-30
Method and system for reducing soft-writing in a multi-level flash memory
Grant 7,522,455 - Bedarida , et al. April 21, 2
2009-04-21
Method and apparatus for discharging a memory cell in a memory device after an erase operation
Grant 7,499,334 - Bedarida , et al. March 3, 2
2009-03-03
Flexible, Low Cost Apparatus And Method To Introduce And Check Algorithm Modifications In A Non-volatile Memory
App 20080250191 - Surico; Stefano ;   et al.
2008-10-09
Nand-like Memory Array Employing High-density Nor-like Memory Devices
App 20080232169 - Frulio; Massimiliano ;   et al.
2008-09-25
Erase verify method for NAND-type flash memories
Grant 7,414,891 - Sivero , et al. August 19, 2
2008-08-19
Method and system for managing address bits during buffered program operations in a memory device
Grant 7,404,049 - Bartoli , et al. July 22, 2
2008-07-22
Compensated current offset in a sensing circuit
App 20080170455 - Bedarida; Lorenzo ;   et al.
2008-07-17
Sense architecture
App 20080170441 - Pelli; Gabriele ;   et al.
2008-07-17
Erase Verify Method For Nand-type Flash Memories
App 20080165585 - Surico; Stefano ;   et al.
2008-07-10
Implementation Of Column Redundancy For A Flash Memory With A High Write Parallelism
App 20080144379 - Bartoli; Simone ;   et al.
2008-06-19
Method and system for regulating a program voltage value during multilevel memory device programming
Grant 7,379,338 - Frulio , et al. May 27, 2
2008-05-27
Method and system for a programming approach for a nonvolatile electronic device
Grant 7,345,921 - Surico , et al. March 18, 2
2008-03-18
Column decoding architecture for flash memories
Grant 7,333,389 - Sivero , et al. February 19, 2
2008-02-19
Method and system for managing a suspend request in a flash memory
Grant 7,302,518 - Surico , et al. November 27, 2
2007-11-27
System and method for matching resistance in a non-volatile memory
Grant 7,283,396 - Bedarida , et al. October 16, 2
2007-10-16
System for configuring parameters for a flash memory
Grant 7,249,215 - Surico , et al. July 24, 2
2007-07-24
System for configuring parameters for a flash memory
App 20070083699 - Surico; Stefano ;   et al.
2007-04-12
Method and system for regulating a program voltage value during multilevel memory device programming
App 20070076476 - Frulio; Massimiliano ;   et al.
2007-04-05
Method and apparatus for discharging a memory cell in a memory device after an erase operation
App 20070047325 - Bedarida; Lorenzo ;   et al.
2007-03-01
Method and system for regulating a program voltage value during multilevel memory device programming
Grant 7,184,311 - Frulio , et al. February 27, 2
2007-02-27
Method and system for configuring parameters for flash memory
Grant 7,181,565 - Surico , et al. February 20, 2
2007-02-20
Compensated method to implement a high voltage discharge phase after erase pulse in a flash memory device
Grant 7,177,198 - Bedarida , et al. February 13, 2
2007-02-13
System for performing fast testing during flash reference cell setting
Grant 7,158,415 - Bedarida , et al. January 2, 2
2007-01-02
System and method for matching resistance in a non-volatile memory
App 20060279988 - Bedarida; Lorenzo ;   et al.
2006-12-14
Method and system for configuring parameters for flash memory
App 20060253644 - Surico; Stefano ;   et al.
2006-11-09
Method and system for managing a suspend request in a flash memory
App 20060161727 - Surico; Stefano ;   et al.
2006-07-20
Method and system for reducing soft-writing in a multi-level flash memory
App 20060140010 - Bedarida; Lorenzo ;   et al.
2006-06-29
System for performing fast testing during flash reference cell setting
App 20060140030 - Bedarida; Lorenzo ;   et al.
2006-06-29
Method and system for regulating a program voltage value during multilevel memory device programming
App 20060114721 - Frulio; Massimiliano ;   et al.
2006-06-01
Method and system for managing address bits during buffered program operations in a memory device
App 20060085622 - Bartoli; Simone ;   et al.
2006-04-20
Column decoding architecture for flash memories
App 20060077746 - Sivero; Stefano ;   et al.
2006-04-13
Method and system for a programming approach for a nonvolatile electronic device
App 20060077714 - Surico; Stefano ;   et al.
2006-04-13
Compensated method to implement a high voltage discharge phase after erase pulse in a flash memory device
App 20060062063 - Bedarida; Lorenzo ;   et al.
2006-03-23
Autotesting method of a memory cell matrix, particularly of the non-volatile type
Grant 6,963,512 - Geraci , et al. November 8, 2
2005-11-08
Non-volatile memory with functional capability of simultaneous modification of the content and burst mode read or page mode read
Grant 6,912,598 - Bedarida , et al. June 28, 2
2005-06-28
Non-volatile memory device with burst mode reading and corresponding reading method
Grant 6,854,040 - Bartoli , et al. February 8, 2
2005-02-08
Flash memory architecture with page mode erase using NMOS and PMOS row decoding scheme
Grant 6,804,148 - Bedarida , et al. October 12, 2
2004-10-12
Variable Charge Pump Circuit With Dynamic Load
App 20040080360 - Bedarida, Lorenzo ;   et al.
2004-04-29
Flash memory architecture with page mode erase using NMOS and PMOS row decoding scheme
App 20040076037 - Bedarida, Lorenzo ;   et al.
2004-04-22
Variable charge pump circuit with dynamic load
Grant 6,724,241 - Bedarida , et al. April 20, 2
2004-04-20
Dac-based Voltage Regulator For Flash Memory Array
App 20040046681 - Frulio, Massimiliano ;   et al.
2004-03-11
Threshold voltage reduction of a transistor connected as a diode
Grant 6,624,683 - Bedarida , et al. September 23, 2
2003-09-23
Autotesting method of a memory cell matrix, particularly of the non-volatile type
App 20030147293 - Geraci, Antonino ;   et al.
2003-08-07
Synchronous-reading nonvolatile memory
App 20020122347 - Frulio, Massimiliano ;   et al.
2002-09-05
Architecture for handling internal voltages in a non-volatile memory, particularly in a single-voltage supply type of dual-work flash memory
Grant 6,385,107 - Bedarida , et al. May 7, 2
2002-05-07
Non-volatile memory with a charge pump with regulated voltage
App 20020018390 - Confalonieri, Emanuele ;   et al.
2002-02-14
Buffer device with dual supply voltage for low supply voltage applications
Grant 6,320,361 - Dima , et al. November 20, 2
2001-11-20
Buffer device with dual supply voltage for low supply voltage applications
App 20010019260 - Dima, Vincenzo ;   et al.
2001-09-06
Method of avoiding disturbance during the step of programming and erasing an electrically programmable, semiconductor non-volatile storage device
Grant 6,195,290 - Dallabora , et al. February 27, 2
2001-02-27

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed