Barth; Karl W.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Barth; Karl W..The latest application filed is for "hybrid bonding interface for 3-dimensional chip integration".

Company Profile

0.9.9

Barth; Karl W. - Poughkeepsie NY
Barth; Karl W. - Hopewell Junction NY
Barth; Karl W. - Beacon NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Hybrid bonding interface for 3-dimensional chip integration Grant 8,349,729 - Barth , et al. January 8, 2	2013-01-08
Fuse link structures using film stress for programming and methods of manufacture Grant 8,236,655 - Barth , et al. August 7, 2	2012-08-07
Hybrid Bonding Interface For 3-dimensional Chip Integration App 20120171818 - Barth; Karl W. ; et al.	2012-07-05
Hybrid bonding interface for 3-dimensional chip integration Grant 8,159,060 - Barth , et al. April 17, 2	2012-04-17
Fuse link structures using film stress for programming and methods of manufacture Grant 8,089,105 - Barth , et al. January 3, 2	2012-01-03
Hybrid Bonding Interface For 3-dimensional Chip Integration App 20110101537 - Barth; Karl W. ; et al.	2011-05-05
Fuse Link Structures Using Film Stress For Programming And Methods Of Manufacture App 20110045644 - Barth; Karl W. ; et al.	2011-02-24
Fuse Link Structures Using Film Stress For Programming And Methods Of Manufacture App 20110042779 - Barth; Karl W. ; et al.	2011-02-24
Fuse link structures using film stress for programming and methods of manufacture Grant 7,892,926 - Barth , et al. February 22, 2	2011-02-22
Fuse Link Structures Using Film Stress For Programming And Methods Of Manufacture App 20110018091 - Barth; Karl W. ; et al.	2011-01-27
Metal interconnect and IC chip including metal interconnect Grant 7,851,919 - Barth , et al. December 14, 2	2010-12-14
Metal Interconnect And Ic Chip Including Metal Interconnect App 20100133694 - Barth; Karl W. ; et al.	2010-06-03
Metal interconnect forming methods and IC chip including metal interconnect Grant 7,718,525 - Barth , et al. May 18, 2	2010-05-18
Stress relaxation, selective nitride phase removal Grant 7,541,277 - Petrarca , et al. June 2, 2	2009-06-02
Manufacturing Ic Chip In Portions For Later Combining, And Related Structure App 20090014868 - Barth; Karl W. ; et al.	2009-01-15
Metal Interconnect Forming Methods And Ic Chip Including Metal Interconnect App 20090001592 - Barth; Karl W. ; et al.	2009-01-01
System and method for determining line widths of free-standing structures resulting from a semiconductor manufacturing process Grant 7,101,817 - Lucarini , et al. September 5, 2	2006-09-05
System And Method For Determining Line Widths Of Free-standing Structures Resulting From A Semiconductor Manufacturing Process App 20060099832 - Lucarini; Stephen M. ; et al.	2006-05-11

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