Barry; Edwin F.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Barry; Edwin F..The latest application filed is for "methods and apparatus for providing bit-reversal and multicast functions utilizing dma controller".

Company Profile

0.27.25

Barry; Edwin F. - Vilas NC
Barry; Edwin F. - Cary NC
Barry; Edwin F. - Sugar Grove NC

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods and apparatus for address translation functions Grant 9,400,652 - Barry , et al. July 26, 2	2016-07-26
Methods and Apparatus for Providing Bit-Reversal and Multicast Functions Utilizing DMA Controller App 20140075081 - Barry; Edwin F. ; et al.	2014-03-13
Methods and Apparatus for Providing Bit-Reversal and Multicast Functions Utilizing DMA Controller App 20120331185 - Barry; Edwin F. ; et al.	2012-12-27
Methods and Apparatus for Providing Bit-Reversal and Multicast Functions Utilizing DMA Controller App 20110302333 - Barry; Edwin F. ; et al.	2011-12-08
Methods and Apparatus for Providing Bit-Reversal and Multicast Functions Utilizing DMA Controller App 20110225392 - Barry; Edwin F. ; et al.	2011-09-15
Methods and Apparatus for Providing Bit-Reversal and Multicast Functions Utilizing DMA Controller App 20100257290 - Barry; Edwin F. ; et al.	2010-10-07
Methods and Apparatus for Providing Bit-Reversal and Multicast Functions Utilizing DMA Controller App 20080016262 - Barry; Edwin F. ; et al.	2008-01-17
Coprocessor instruction loading from port register based on interrupt vector table indication App 20060117166 - Barry; Edwin F.	2006-06-01
Coprocessor instruction loading from port register based on interrupt vector table indication Grant 7,017,029 - Barry March 21, 2	2006-03-21
Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution Grant 7,010,668 - Drabenstott , et al. March 7, 2	2006-03-07
Methods and apparatus for providing bit-reversal and multicast functions utilizing DMA controller Grant 6,986,020 - Barry , et al. January 10, 2	2006-01-10
Methods and apparatus for providing bit-reversal and multicast functions utilizing DMA controller App 20050289259 - Barry, Edwin F. ; et al.	2005-12-29
Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution Grant 6,954,842 - Drabenstott , et al. October 11, 2	2005-10-11
Methods and apparatus for dual-use coprocessing/debug interface App 20050149693 - Barry, Edwin F.	2005-07-07
Specifying different type generalized event and action pair in a processor App 20050125644 - Barry, Edwin F. ; et al.	2005-06-09
Methods and apparatus for providing context switching between software tasks with reconfigurable control Grant 6,868,490 - Barry , et al. March 15, 2	2005-03-15
Control processor dynamically loading shadow instruction register associated with memory entry of coprocessor in flexible coupling mode Grant 6,865,663 - Barry March 8, 2	2005-03-08
Methods and apparatus for providing bit-reversal and multicast functions utilizing DMA controller App 20050038936 - Barry, Edwin F. ; et al.	2005-02-17
Methods and apparatus for scalable instruction set architecture with dynamic compact instructions Grant 6,848,041 - Pechanek , et al. January 25, 2	2005-01-25
Methods and apparatus for providing bit-reversal and multicast functions utilizing DMA controller Grant 6,834,295 - Barry , et al. December 21, 2	2004-12-21
Methods and apparatus for ManArray PE-PE switch control Grant 6,795,909 - Barry , et al. September 21, 2	2004-09-21
Methods and apparatus to dynamically reconfigure the instruction pipeline of an indirect very long instruction word scalable processor Grant 6,775,766 - Revilla , et al. August 10, 2	2004-08-10
Methods and apparatus for providing context switching between software tasks with reconfigurable control App 20040153634 - Barry, Edwin F. ; et al.	2004-08-05
Methods and apparatus for manifold array processing Grant 6,769,056 - Barry , et al. July 27, 2	2004-07-27
Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution Grant 6,760,831 - Drabenstott , et al. July 6, 2	2004-07-06
Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution App 20040107333 - Drabenstott, Thomas L. ; et al.	2004-06-03
Specifying different type generalized event and action pair in a processor Grant 6,735,690 - Barry , et al. May 11, 2	2004-05-11
Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution App 20040049664 - Drabenstott, Thomas L. ; et al.	2004-03-11
Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution App 20040039899 - Drabenstott, Thomas L. ; et al.	2004-02-26
Methods and apparatus for scalable instruction set architecture with dynamic compact instructions App 20030200420 - Pechanek, Gerald G. ; et al.	2003-10-23
Methods and apparatus for instruction addressing in indirect VLIW processors Grant 6,581,152 - Barry , et al. June 17, 2	2003-06-17
Methods and apparatus for manifold array processing App 20030088754 - Barry, Edwin F. ; et al.	2003-05-08
Methods and apparatus for scalable instruction set architecture with dynamic compact instructions Grant 6,557,094 - Pechanek , et al. April 29, 2	2003-04-29
Methods and apparatus for dynamic very long instruction word sub-instruction selection for execution time parallelism in an indirect very long instruction word processor App 20030079109 - Pechanek, Gerald G. ; et al.	2003-04-24
Methods and apparatus to dynamically reconfigure the instruction pipeline of an indirect very long instruction word scalable processor App 20030061473 - Revilla, Juan Guillermo ; et al.	2003-03-27
Methods and apparatus for manifold array processing Grant 6,470,441 - Pechanek , et al. October 22, 2	2002-10-22
Methods and apparatus for dynamic very long instruction word sub-instruction selection for execution time parallelism in an indirect very long instruction word processor Grant 6,467,036 - Pechanek , et al. October 15, 2	2002-10-15
Register file indexing methods and apparatus for providing indirect control of register addressing in a VLIW processor Grant 6,446,190 - Barry , et al. September 3, 2	2002-09-03
Methods and apparatus for dynamic instruction controlled reconfigurable register file with extended precision Grant 6,430,677 - Pechanek , et al. August 6, 2	2002-08-06
Methods and apparatus for instruction addressing in indirect VLIW processors App 20020078320 - Barry, Edwin F. ; et al.	2002-06-20
Methods and apparatus for scalable instruction set architecture with dynamic compact instructions App 20020073299 - Pechanek, Gerald G. ; et al.	2002-06-13
Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution Grant 6,366,999 - Drabenstott , et al. April 2, 2	2002-04-02
Methods and apparatus for instruction addressing in indirect VLIW processors Grant 6,356,994 - Barry , et al. March 12, 2	2002-03-12
Methods and apparatus for dynamic instruction controlled reconfiguration register file with extended precision Grant 6,343,356 - Pechanek , et al. January 29, 2	2002-01-29
Methods and apparatus for providing bit-reversal and multicast functions utilizing DMA controller App 20020002640 - Barry, Edwin F. ; et al.	2002-01-03
Methods and apparatus for scalable instruction set architecture with dynamic compact instructions Grant 6,321,322 - Pechanek , et al. November 20, 2	2001-11-20
Methods and apparatus for dual-use coprocessing/debug interface App 20010032305 - Barry, Edwin F.	2001-10-18
Methods and apparatus for dynamic instruction controlled reconfigurable register file with extended precision App 20010011342 - Pechanek, Gerald G. ; et al.	2001-08-02
Methods and apparatus to dynamically reconfigure the instruction pipeline of an indirect very long instruction word scalable processor Grant 6,216,223 - Revilla , et al. April 10, 2	2001-04-10
Methods and apparatus for dynamic very long instruction word sub-instruction selection for execution time parallelism in an indirect very long instruction word processor Grant 6,173,389 - Pechanek , et al. January 9, 2	2001-01-09
Method and apparatus for manifold array processing Grant 6,167,502 - Pechanek , et al. December 26, 2	2000-12-26

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