Baror; Gigy

Patent Applications and Registrations

Patent applications and USPTO patent grants for Baror; Gigy.The latest application filed is for "data processing device with memory coupling unit".

Company Profile

0.10.1

Baror; Gigy - Ramat Gan IL
Baror; Gigy - Austin TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Interface for a memory unit Grant 6,507,899 - Oberlaender , et al. January 14, 2	2003-01-14
Data processing device with memory coupling unit App 20020129188 - Fleck, Rod G. ; et al.	2002-09-12
Execution of a loop instructing in a loop pipeline after detection of a first occurrence of the loop instruction in an integer pipeline Grant 6,076,159 - Fleck , et al. June 13, 2	2000-06-13
Organization of an integrated cache unit for flexible usage in supporting multiprocessor operations Grant 6,014,728 - Baror January 11, 2	2000-01-11
Organization of an integrated cache unit for flexible usage in supporting microprocessor operations Grant 5,627,992 - Baror May 6, 1	1997-05-06
Programmable cache memory as well as system incorporating same and method of operating programmable cache memory Grant 5,185,878 - Baror , et al. February 9, 1	1993-02-09
Methods and apparatus for caching interlock variables in an integrated cache memory Grant 5,136,691 - Baror August 4, 1	1992-08-04
Organization of an integrated cache unit for flexible usage in cache system design Grant 5,025,366 - Baror June 18, 1	1991-06-18
Streamlined instruction processor Grant 4,926,323 - Baror , et al. May 15, 1	1990-05-15
High performance processor interface between a single chip processor and off chip memory means having a dedicated and shared bus structure Grant 4,851,990 - Johnson , et al. July 25, 1	1989-07-25
Clock scheme for VLSI systems Grant 4,761,567 - Walters, Jr. , et al. August 2, 1	1988-08-02

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