loadpatents
name:-0.02337908744812
name:-0.020893096923828
name:-0.0044879913330078
BARNOLA; Sebastien Patent Filings

BARNOLA; Sebastien

Patent Applications and Registrations

Patent applications and USPTO patent grants for BARNOLA; Sebastien.The latest application filed is for "electronic component manufacturing method".

Company Profile
3.19.20
  • BARNOLA; Sebastien - Grenoble FR
  • Barnola; Sebastien - Villard Bonnot FR
  • Barnola; Sebastien - Carantec FR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Electronic Component Manufacturing Method
App 20220020924 - CANVEL; Yann ;   et al.
2022-01-20
Electronic component manufacturing method
Grant 11,152,570 - Canvel , et al. October 19, 2
2021-10-19
Method for selective etching of a block copolymer
Grant 10,875,236 - Posseme , et al. December 29, 2
2020-12-29
Electronic Component Manufacturing Method
App 20200098989 - Canvel; Yann ;   et al.
2020-03-26
Method of etching a three-dimensional dielectric layer
Grant 10,573,529 - Posseme , et al. Feb
2020-02-25
Method Of Etching A Three-dimensional Dielectric Layer
App 20190214266 - POSSEME; Nicolas ;   et al.
2019-07-11
Method for producing on the same transistors substrate having different characteristics
Grant 10,347,545 - Grenouillet , et al. July 9, 2
2019-07-09
Method For Selective Etching Of A Block Copolymer
App 20190047208 - POSSEME; Nicolas ;   et al.
2019-02-14
Method of etching a porous dielectric material
Grant 10,062,602 - Posseme , et al. August 28, 2
2018-08-28
Method for producing patterns by ion implantation
Grant 9,953,807 - Landis , et al. April 24, 2
2018-04-24
Method for obtaining patterns in a layer
Grant 9,934,973 - Landis , et al. April 3, 2
2018-04-03
Method For Obtaining Patterns In A Layer
App 20170372904 - LANDIS; Stephan ;   et al.
2017-12-28
Method For Producing On The Same Transistors Substrate Having Different Characteristics
App 20170358502 - GRENOUILLET; Laurent ;   et al.
2017-12-14
Method For Producing Patterns By Ion Implantation
App 20170352522 - LANDIS; Stefan ;   et al.
2017-12-07
Method for the surface etching of a three-dimensional structure
Grant 9,698,250 - Posseme , et al. July 4, 2
2017-07-04
Method for manufacturing a substrate provided with different active areas and with planar and three-dimensional transistors
Grant 9,558,957 - Andrieu , et al. January 31, 2
2017-01-31
Production of spacers at flanks of a transistor gate
Grant 9,543,409 - Arvet , et al. January 10, 2
2017-01-10
Method For Making An Integrated Circuit
App 20160099326 - BARNOLA; Sebastien ;   et al.
2016-04-07
Method For The Surface Etching Of A Three-dimensional Structure
App 20160079396 - POSSEME; Nicolas ;   et al.
2016-03-17
Production Of Spacers At Flanks Of A Transistor Gate
App 20160079388 - ARVET; Christian ;   et al.
2016-03-17
Method for making an integrated circuit
Grant 9,240,325 - Barnola , et al. January 19, 2
2016-01-19
Lithography method for doubled pitch
Grant 9,156,306 - Pain , et al. October 13, 2
2015-10-13
Method For Making An Integrated Circuit
App 20150091106 - BARNOLA; SEBASTIEN ;   et al.
2015-04-02
Lithographic method for making networks of conductors connected by vias
Grant 8,889,550 - Belledent , et al. November 18, 2
2014-11-18
Process for producing an integrated circuit
Grant 8,877,622 - Poiroux , et al. November 4, 2
2014-11-04
Method Of Etching A Porous Dielectric Material
App 20140187035 - POSSEME; Nicolas ;   et al.
2014-07-03
Method for making a pattern from sidewall image transfer
Grant 8,669,188 - Barnola , et al. March 11, 2
2014-03-11
Method For Manufacturing A Substrate Provided With Different Active Areas And With Planar And Three-dimensional Transistors
App 20130309854 - ANDRIEU; Francois ;   et al.
2013-11-21
Process For Producing An Integrated Circuit
App 20130252412 - Poiroux; Thierry ;   et al.
2013-09-26
Lithography Method For Doubled Pitch
App 20130087527 - Pain; Laurent ;   et al.
2013-04-11
Lithographic Method for Making Networks of Conductors Connected by Vias
App 20130072017 - Belledent; Jerome ;   et al.
2013-03-21
Method For Making A Pattern From Sidewall Image Transfer
App 20120132616 - BARNOLA; Sebastien ;   et al.
2012-05-31

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