BARNER; Craig
Patent Applications and Registrations
Patent applications and USPTO patent grants for BARNER; Craig.The latest application filed is for "low latency inter-chip communication mechanism in a multi-chip processing system".
- BARNER; Craig - Shrewsbury MA
| Patent | Date |
|---|---|
| Low Latency Inter-chip Communication Mechanism In A Multi-chip Processing System App 20210374057 - BARNER; Craig ; et al. | 2021-12-02 |
| Low latency inter-chip communication mechanism in multi-chip processing system Grant 11,119,929 - Barner , et al. September 14, 2 | 2021-09-14 |
| Low Latency Inter-chip Communication Mechanism In Multi-chip Processing System App 20200250088 - Kind Code | 2020-08-06 |
| Bit error rate impact reduction Grant 9,065,626 - Barner June 23, 2 | 2015-06-23 |
| Word boundary lock Grant 9,059,836 - Barner June 16, 2 | 2015-06-16 |
| Word Boundary Lock App 20150016574 - Barner; Craig | 2015-01-15 |
| Word boundary lock Grant 8,855,248 - Barner October 7, 2 | 2014-10-07 |
| Word Boundary Lock App 20130101069 - Barner; Craig | 2013-04-25 |
| Polarity Detection App 20130101076 - Barner; Craig | 2013-04-25 |
| Bit Error Rate Impact Reduction App 20130104012 - Barner; Craig | 2013-04-25 |
| Microcode Authentication App 20120216050 - Barner; Craig ; et al. | 2012-08-23 |
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