loadpatents
name:-0.032244920730591
name:-0.018995046615601
name:-0.00045990943908691
Barnak; John P. Patent Filings

Barnak; John P.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Barnak; John P..The latest application filed is for "method of manufacturing alloy sputtering targets".

Company Profile
0.14.17
  • Barnak; John P. - Beaverton OR
  • Barnak; John P. - Newberg OR
  • Barnak; John P. - Banks OR
  • Barnak; John P. - Portland OR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Technique to prevent tin contamination of mirrors and electrodes in an EUV lithography system
Grant 7,567,379 - Bristol , et al. July 28, 2
2009-07-28
Integrating n-type and p-type metal gate transistors
Grant 7,316,949 - Doczy , et al. January 8, 2
2008-01-08
Forming an intermediate layer in interconnect joints and structures formed thereby
Grant 7,087,521 - Renavikar , et al. August 8, 2
2006-08-08
Method of manufacturing alloy sputtering targets
App 20060137969 - Feldewerth; Gerald B. ;   et al.
2006-06-29
Under bump metallization layer to enable use of high tin content solder bumps
Grant 7,064,446 - Barnak , et al. June 20, 2
2006-06-20
Forming An Intermediate Layer In Interconnect Joints And Structures Formed Thereby
App 20060110916 - Renavikar; Mukul P. ;   et al.
2006-05-25
MOSFET gate electrodes having performance tuned work functions and methods of making same
Grant 7,022,559 - Barnak , et al. April 4, 2
2006-04-04
Integrating n-type and p-type metal gate transistors
App 20060030104 - Doczy; Mark ;   et al.
2006-02-09
integrating n-type and P-type metal gate transistors
Grant 6,972,225 - Doczy , et al. December 6, 2
2005-12-06
Under bump metallization layer to enable use of high tin content solder bumps
App 20050250323 - Barnak, John P. ;   et al.
2005-11-10
Technique to prevent tin contamination of mirrors and electrodes in an EUV lithography system
App 20050244572 - Bristol, Robert ;   et al.
2005-11-03
Enhanced gate structure
App 20050233530 - Barnak, John P. ;   et al.
2005-10-20
Integrating n-type and p-type metal gate transistors
Grant 6,953,719 - Doczy , et al. October 11, 2
2005-10-11
Under Bump Metallization Layer To Enable Use Of High Tin Content Solder Bumps
App 20050212133 - Barnak, John P. ;   et al.
2005-09-29
Method for making a semiconductor device having a high-k gate dielectric
Grant 6,939,815 - Brask , et al. September 6, 2
2005-09-06
Method for making a semiconductor device having a high-k gate dielectric
Grant 6,897,134 - Brask , et al. May 24, 2
2005-05-24
Method for making a semiconductor device having a high-k gate dielectric
Grant 6,867,102 - Brask , et al. March 15, 2
2005-03-15
Method for making a semiconductor device having a high-k gate dielectric
App 20050048794 - Brask, Justin K. ;   et al.
2005-03-03
Enhanced gate structure
App 20050045961 - Barnak, John P. ;   et al.
2005-03-03
Integrating N-type and P-type metal gate transistors
App 20050040469 - Doczy, Mark ;   et al.
2005-02-24
Integrating n-type and p-type metal gate transistors
Grant 6,858,483 - Doczy , et al. February 22, 2
2005-02-22
Forming a high dielectric constant film using metallic precursor
App 20050017238 - Brask, Justin K. ;   et al.
2005-01-27
Method for making a semiconductor device having a high-k gate dielectric
App 20040235251 - Brask, Justin K. ;   et al.
2004-11-25
Integrating n-type and p-type metal gate transistors
App 20040214385 - Doczy, Mark ;   et al.
2004-10-28
Method for making a semiconductor device having a high-k gate dielectric
Grant 6,806,146 - Brask , et al. October 19, 2
2004-10-19
Method for making a semiconductor device having a high-k gate dielectric
App 20040185627 - Brask, Justin K. ;   et al.
2004-09-23
Integrating n-type and p-type metal gate transistors
App 20040121541 - Doczy, Mark ;   et al.
2004-06-24
Method for making a semiconductor device having a high-k gate dielectric
Grant 6,709,911 - Doczy , et al. March 23, 2
2004-03-23
Method for making a semiconductor device having a high-k gate dielectric
Grant 6,696,327 - Brask , et al. February 24, 2
2004-02-24
MOSFET gate electrodes having performance tuned work functions and methods of making same
App 20030146479 - Barnak, John P. ;   et al.
2003-08-07
Mosfet Gate Electrodes Having Performance Tuned Work Functions And Methods Of Making Same
App 20020008257 - BARNAK, JOHN P. ;   et al.
2002-01-24

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