Barkatullah; Javed S.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Barkatullah; Javed S..The latest application filed is for "delayed write-back in memory".

Company Profile

0.18.12

Barkatullah; Javed S. - Austin TX
Barkatullah; Javed S. - Portand OR
Barkatullah; Javed S. - Portland OR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Delayed write-back in memory Grant 10,657,065 - Andre , et al.	2020-05-19
Delayed Write-back In Memory App 20190213136 - ANDRE; Thomas S. ; et al.	2019-07-11
Delayed write-back in memory Grant 10,268,591 - Andre , et al.	2019-04-23
Delayed Write-back In Memory App 20180267899 - Andre; Thomas ; et al.	2018-09-20
Delayed write-back in memory Grant 9,990,300 - Andre , et al. June 5, 2	2018-06-05
Delayed Write-back In Memory App 20170315920 - Andre; Thomas ; et al.	2017-11-02
PLL with controlled VCO bias Grant 7,342,426 - Kurd , et al. March 11, 2	2008-03-11
PLL with controlled VCO bias App 20070046343 - Kurd; Nasser A. ; et al.	2007-03-01
Method and apparatus for detecting on-die voltage variations Grant 7,133,751 - Kurd , et al. November 7, 2	2006-11-07
Circuit to manage and lower clock inaccuracies of integrated circuits Grant 7,102,402 - Kurd , et al. September 5, 2	2006-09-05
Adaptive frequency clock generation system Grant 7,042,259 - Kurd , et al. May 9, 2	2006-05-09
Smart buffer circuit to match a delay over a range of loads Grant 7,009,437 - Fletcher , et al. March 7, 2	2006-03-07
Adaptive frequency clock generation system App 20050218955 - Kurd, Nasser A. ; et al.	2005-10-06
Method and apparatus for detecting on-die voltage variations App 20050184764 - Kurd, Nasser A. ; et al.	2005-08-25
Clock signal generation and distribution via ring oscillators Grant 6,922,112 - Kurd , et al. July 26, 2	2005-07-26
Adaptive frequency clock signal Grant 6,922,111 - Kurd , et al. July 26, 2	2005-07-26
Method and apparatus for detecting on-die voltage variations Grant 6,882,238 - Kurd , et al. April 19, 2	2005-04-19
Smart buffer circuit to match a delay over a range of loads App 20040217792 - Fletcher, Thomas D. ; et al.	2004-11-04
Method and apparatus for detecting on-die voltage variations App 20040183613 - Kurd, Nasser A. ; et al.	2004-09-23
Adaptive frequency clock signal App 20040119521 - Kurd, Nasser A. ; et al.	2004-06-24
Method and apparatus for correcting a clock duty cycle in a clock distribution network Grant 6,750,689 - Fletcher , et al. June 15, 2	2004-06-15
Automated clock alignment for testing processors in a bypass mode Grant 6,704,892 - Kurd , et al. March 9, 2	2004-03-09
Clock signal generation and distribution via ring oscillators App 20030234694 - Kurd, Nasser A. ; et al.	2003-12-25
Circuit to manage and lower clock inaccuracies of integrated circuits App 20030221143 - Kurd, Nasser A. ; et al.	2003-11-27
Generating a 2-phase clock using a non-50% divider circuit Grant 6,629,255 - Barkatullah , et al. September 30, 2	2003-09-30
Clock distribution system for selectively enabling clock signals to portions of a pipelined circuit Grant 6,611,920 - Fletcher , et al. August 26, 2	2003-08-26
Method and apparatus for correcting a clock duty cycle App 20020140478 - Fletcher, Thomas D. ; et al.	2002-10-03
Core clock correction in a 2/n mode clocking scheme Grant 6,268,749 - Fisch , et al. July 31, 2	2001-07-31
Core clock correction in a 2/N mode clocking scheme Grant 6,208,180 - Fisch , et al. March 27, 2	2001-03-27
Method and apparatus for clock skew compensation Grant 6,192,092 - Dizon , et al. February 20, 2	2001-02-20

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