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Patent applications and USPTO patent grants for Baratam; Anil Kumar.The latest application filed is for "latch architecture for low power applications".
Patent | Date |
---|---|
Latch architecture for low power applications Grant 11,456,727 - Baratam September 27, 2 | 2022-09-27 |
Logic configuration techniques Grant 11,405,040 - Baratam August 2, 2 | 2022-08-02 |
Latch Architecture for Low Power Applications App 20220123737 - Baratam; Anil Kumar | 2022-04-21 |
Level shifter circuitry using current mirrors Grant 11,245,388 - Rajalakshmi , et al. February 8, 2 | 2022-02-08 |
Logic Configuration Techniques App 20210305985 - Baratam; Anil Kumar | 2021-09-30 |
Level Shifter Circuitry Using Current Mirrors App 20210218389 - Rajalakshmi; Navaneeth Narayanan Namboodiri ;   et al. | 2021-07-15 |
Multiplier Circuitry App 20210157603 - Shekhar; Shardendu ;   et al. | 2021-05-27 |
Multi-input logic circuitry Grant 10,922,465 - Baratam , et al. February 16, 2 | 2021-02-16 |
Multi-Input Logic Circuitry App 20200104444 - Baratam; Anil Kumar ;   et al. | 2020-04-02 |
Clock gating circuit Grant 10,355,674 - Baratam , et al. July 16, 2 | 2019-07-16 |
Clock Gating Circuit App 20190028091 - Baratam; Anil Kumar ;   et al. | 2019-01-24 |
Sequential logic device with single-phase clock operation Grant 10,187,063 - Scantlin , et al. Ja | 2019-01-22 |
Master-slave flip-flop circuit and method of operating the master-slave flip-flop circuit Grant 9,306,545 - Baratam April 5, 2 | 2016-04-05 |
Master-slave Flip-flop Circuit And Method Of Operating The Master-slave Flip-flop Circuit App 20150200651 - BARATAM; Anil Kumar | 2015-07-16 |
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