loadpatents
name:-0.0036029815673828
name:-0.037326812744141
name:-0.00042510032653809
Bandoh; Tadaaki Patent Filings

Bandoh; Tadaaki

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bandoh; Tadaaki.The latest application filed is for "information processor and information processing system utilizing interface for synchronizing clock signal".

Company Profile
0.34.2
  • Bandoh; Tadaaki - Tohkai-mura JP
  • Bandoh, Tadaaki - Ibaraki-ken JP
  • Bandoh; Tadaaki - Ibaraki JP
  • Bandoh; Tadaaki - Tohkai JP
  • Bandoh; Tadaaki - Toukai JP
  • Bandoh; Tadaaki - Hitachi JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Information processor and information processing system utilizing interface for synchronizing clock signal
Grant 7,111,187 - Hotta , et al. September 19, 2
2006-09-19
Information processor and information processing system utilizing interface for synchronizing clock signal
App 20040093532 - Hotta, Takashi ;   et al.
2004-05-13
Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices
Grant 6,675,311 - Hotta , et al. January 6, 2
2004-01-06
Information processor and information processing system utilizing interface for synchronizing clock signal
App 20020059538 - Hotta, Takashi ;   et al.
2002-05-16
Method and apparatus for processing data in multiple modes in accordance with parallelism of program by using cache memory
Grant 5,968,160 - Saito , et al. October 19, 1
1999-10-19
Method and apparatus for processing data in multiple modes in accordance with parallelism of program by using cache memory
Grant 5,784,630 - Saito , et al. July 21, 1
1998-07-21
Logical cache memory for multi-processor system
Grant 5,623,626 - Morioka , et al. April 22, 1
1997-04-22
Parallel processing apparatus and method capable of processing plural instructions in parallel or successively
Grant 5,561,775 - Kurosawa , et al. October 1, 1
1996-10-01
Information processor and information processing system utilizing clock signal
Grant 5,542,083 - Hotta , et al. July 30, 1
1996-07-30
Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices
Grant 5,506,982 - Hotta , et al. April 9, 1
1996-04-09
Parallel processing apparatus and method capable of switching parallel and successive processing modes
Grant 5,404,472 - Kurosawa , et al. April 4, 1
1995-04-04
Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices
Grant 5,388,249 - Hotta , et al. February 7, 1
1995-02-07
Compile type knowledge processing tool, a high-speed inference method therefor and a system using the tool
Grant 5,297,239 - Kurosawa , et al. March 22, 1
1994-03-22
Parallel processing apparatus and method capable of switching parallel and successive processing modes
Grant 5,287,465 - Kurosawa , et al. February 15, 1
1994-02-15
Multi-processor system having a multi-port cache memory
Grant 5,247,649 - Bandoh September 21, 1
1993-09-21
System for storing restart address of microprogram, determining the validity, and using valid restart address to resume execution upon removal of suspension
Grant 5,146,569 - Yamaguchi , et al. September 8, 1
1992-09-08
Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices
Grant 5,133,064 - Hotta , et al. July 21, 1
1992-07-21
Suspended instruction restart processing system based on a checkpoint microprogram address
Grant 5,003,458 - Yamaguchi , et al. March 26, 1
1991-03-26
Vector processor
Grant 4,853,890 - Abe , et al. August 1, 1
1989-08-01
Apparatus for performing floating point arithmetic operations and rounding the result thereof
Grant 4,839,846 - Hirose , et al. June 13, 1
1989-06-13
Microprogrammed control data processing apparatus in which operand source and/or operand destination is determined independent of microprogram control
Grant 4,807,113 - Matsumoto , et al. February 21, 1
1989-02-21
Multicomputer system having dual common memories
Grant 4,783,731 - Miyazaki , et al. November 8, 1
1988-11-08
Data processing unit with pipelined operands
Grant RE32,493 - Matsumoto , et al. September 1, 1
1987-09-01
Floating point data adder
Grant 4,644,490 - Kobayashi , et al. February 17, 1
1987-02-17
Central processing unit for executing instructions of variable length having end information for operand specifiers
Grant 4,530,050 - Fukunaga , et al. July 16, 1
1985-07-16
Bus selection control in a data transmission apparatus for a multiprocessor system
Grant 4,523,272 - Fukunaga , et al. June 11, 1
1985-06-11
Data processing system with processors having different processing speeds sharing a common bus
Grant 4,523,274 - Fukunaga , et al. June 11, 1
1985-06-11
Data processing system
Grant 4,520,441 - Bandoh , et al. May 28, 1
1985-05-28
Multi-computer system having dual common memory
Grant 4,486,834 - Kobayashi , et al. December 4, 1
1984-12-04
Shared virtual address translation unit for a multiprocessor system
Grant 4,481,573 - Fukunaga , et al. November 6, 1
1984-11-06
Data processing unit with pipelined operands
Grant 4,454,578 - Matsumoto , et al. June 12, 1
1984-06-12
Control of instruction pipeline in data processing system
Grant 4,365,311 - Fukunaga , et al. December 21, 1
1982-12-21
Address conversion unit for data processing system
Grant 4,296,468 - Bandoh , et al. October 20, 1
1981-10-20
System for stopping and restarting the operation of a data processor
Grant 4,095,268 - Kobayashi , et al. June 13, 1
1978-06-13
Device protection method and apparatus
Grant 3,986,169 - Kobayashi , et al. October 12, 1
1976-10-12
Bus-coupler
Grant 3,947,818 - Kobayashi , et al. March 30, 1
1976-03-30

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