Ballagh; Jonathan B.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ballagh; Jonathan B..The latest application filed is for "mosaic generation from user-created content".

Company Profile

2.54.5

Ballagh; Jonathan B. - Boulder CO US
Ballagh; Jonathan B. - Leesburg VA
Ballagh; Jonathan B. - Longmont CO

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods and arrangements for content filtering Grant 10,673,795 - Milne , et al.	2020-06-02
Method and apparatus of graphical object selection in a web browser Grant 9,620,084 - Ballagh , et al. April 11, 2	2017-04-11
Non-language-based object search Grant 9,208,174 - Ballagh , et al. December 8, 2	2015-12-08
Mosaic generation from user-created content Grant 9,141,255 - Stroomer , et al. September 22, 2	2015-09-22
Mechanism for displaying visual clues to stacking order during a drag and drop operation Grant 8,947,452 - Ballagh , et al. February 3, 2	2015-02-03
Simulation that transfers port values of a design block via a configuration block of a programmable device Grant 8,812,289 - Chan , et al. August 19, 2	2014-08-19
Managing programmable device configuration Grant 8,224,638 - Shirazi , et al. July 17, 2	2012-07-17
Method of abstracting a graphical object in a line art style suitable for printing and artwork-coloring Grant 8,207,969 - Ballagh , et al. June 26, 2	2012-06-26
Mosaic Generation From User-created Content App 20120159348 - Stroomer; Jeffrey D. ; et al.	2012-06-21
Method and Apparatus of Graphical Object Selection in a Web Browser App 20120079390 - Ballagh; Jonathan B. ; et al.	2012-03-29
Method and apparatus of graphical object selection in a web browser Grant 8,091,030 - Ballagh , et al. January 3, 2	2012-01-03
Displaying signals of a design block emulated in hardware co-simulation Grant 8,082,139 - Ballagh , et al. December 20, 2	2011-12-20
Method of simulating bidirectional signals in a modeling system Grant 7,934,185 - Ballagh , et al. April 26, 2	2011-04-26
Method and apparatus of graphical object selection Grant 7,911,481 - Ballagh , et al. March 22, 2	2011-03-22
Using XTables to communicate in a high level modeling system Grant 7,895,564 - Stroomer , et al. February 22, 2	2011-02-22
Methods And Arrangements For Content Filtering App 20110035456 - Milne; Roger Brent ; et al.	2011-02-10
Efficient communication of data between blocks in a high level modeling system Grant 7,870,522 - Kelly , et al. January 11, 2	2011-01-11
Using scripts for netlisting in a high-level modeling system Grant 7,797,677 - Ballagh , et al. September 14, 2	2010-09-14
Systems and methods of co-simulation utilizing multiple PLDs in a boundary scan chain Grant 7,747,423 - Shirazi , et al. June 29, 2	2010-06-29
Fast hardware co-simulation reset using partial bitstreams Grant 7,739,092 - Ballagh , et al. June 15, 2	2010-06-15
Command buffering for hardware co-simulation Grant 7,707,019 - Ballagh , et al. April 27, 2	2010-04-27
Point-to-point ethernet hardware co-simulation interface Grant 7,636,653 - Chan , et al. December 22, 2	2009-12-22
Parameterizable compact network processor for low-level communication with an integrated circuit Grant 7,590,137 - Chan , et al. September 15, 2	2009-09-15
Shared memory interface in a programmable logic device using partial reconfiguration Grant 7,546,572 - Ballagh , et al. June 9, 2	2009-06-09
Method and apparatus for interfacing instruction processors and logic in an electronic circuit modeling system Grant 7,539,953 - Seng , et al. May 26, 2	2009-05-26
Clock stabilization detection for hardware simulation Grant 7,478,030 - Ballagh , et al. January 13, 2	2009-01-13
Transformation of graphs representing an electronic design in a high modeling system Grant 7,444,603 - Kelly , et al. October 28, 2	2008-10-28
Hardware-based co-simulation on a PLD having an embedded processor Grant 7,437,280 - Ballagh , et al. October 14, 2	2008-10-14
Embedding a co-simulated hardware object in an event-driven simulator Grant 7,433,813 - Ballagh , et al. October 7, 2	2008-10-07
Wireless dynamic boundary-scan topologies for field Grant 7,383,478 - Ballagh , et al. June 3, 2	2008-06-03
Vector transfer during co-simulation Grant 7,376,544 - Dick , et al. May 20, 2	2008-05-20
Efficient communication of data between blocks in a high level modeling system Grant 7,366,998 - Kelly , et al. April 29, 2	2008-04-29
Co-simulation interface Grant 7,366,651 - Milne , et al. April 29, 2	2008-04-29
Method of simulating bidirectional signals in a modeling system Grant 7,363,600 - Ballagh , et al. April 22, 2	2008-04-22
Hardware co-simulation breakpoints in a high-level modeling system Grant 7,346,481 - Ballagh , et al. March 18, 2	2008-03-18
Shared memory for co-simulation Grant 7,346,482 - Ballagh , et al. March 18, 2	2008-03-18
Vector interface to shared memory in simulating a circuit design Grant 7,343,572 - Stone , et al. March 11, 2	2008-03-11
Relocating blocks for netlist generation of an electronic system Grant 7,328,421 - Ballagh , et al. February 5, 2	2008-02-05
Communication between clock domains of an electronic circuit Grant 7,287,178 - Milne , et al. October 23, 2	2007-10-23
Embedding a hardware object in an application system Grant 7,284,225 - Ballagh , et al. October 16, 2	2007-10-16
Method of and apparatus for specifying clock domains in electronic circuit designs Grant 7,269,811 - Ballagh , et al. September 11, 2	2007-09-11
Translation of an electronic integrated circuit design into hardware Grant 7,207,015 - Ballagh , et al. April 17, 2	2007-04-17
HDL co-simulation in a high-level modeling system Grant 7,203,632 - Milne , et al. April 10, 2	2007-04-10
Co-simulation via boundary scan interface Grant 7,184,946 - Ballagh , et al. February 27, 2	2007-02-27
Incremental netlisting Grant 7,086,030 - Stroomer , et al. August 1, 2	2006-08-01
Integrated circuit with overclocked dedicated logic circuitry Grant 7,068,071 - Milne , et al. June 27, 2	2006-06-27
Configurable address generator and circuit using same Grant 7,010,664 - Ballagh , et al. March 7, 2	2006-03-07
Translation of an electronic integrated circuit design into hardware description language using circuit description template Grant 7,007,261 - Ballagh , et al. February 28, 2	2006-02-28
Specification of the hierarchy, connectivity, and graphical representation of a circuit design Grant 7,003,751 - Stroomer , et al. February 21, 2	2006-02-21
Integrated circuit with overclocked dedicated logic circuitry Grant 6,911,840 - Milne , et al. June 28, 2	2005-06-28
Method and system for generating a circuit design including a peripheral component connected to a bus Grant 6,883,147 - Ballagh , et al. April 19, 2	2005-04-19
Co-simulation via boundary scan interface App 20040260528 - Ballagh, Jonathan B. ; et al.	2004-12-23
HDL Co-simulation in a high-level modeling system App 20040181385 - Milne, Roger B. ; et al.	2004-09-16