Bailey; Daniel William

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bailey; Daniel William.The latest application filed is for "autonomous driving controller encrypted communications".

Company Profile

5.7.9

Bailey; Daniel William - Austin TX
Bailey; Daniel William - Northboro MA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Autonomous Driving Controller Encrypted Communications App 20210385073 - Fortenberry; Thaddeus ; et al.	2021-12-09
Parallel Processing System Runtime State Reload App 20210263811 - Bailey; Daniel William ; et al.	2021-08-26
Autonomous driving controller encrypted communications Grant 11,005,649 - Fortenberry , et al. May 11, 2	2021-05-11
Clock sprinklers for a system on a chip Grant 10,921,849 - Bailey February 16, 2	2021-02-16
Parallel processing system runtime state reload Grant 10,802,929 - Bailey , et al. October 13, 2	2020-10-13
Autonomous Driving System Component Fault Prediction App 20200320807 - Gorti; Atchyuth ; et al.	2020-10-08
Autonomous Driving Controller Encrypted Communications App 20190334706 - Fortenberry; Thaddeus ; et al.	2019-10-31
Clock Sprinklers For A System On A Chip App 20190204864 - Bailey; Daniel William	2019-07-04
Parallel Processing System Runtime State Reload App 20190205218 - Bailey; Daniel William ; et al.	2019-07-04
Asymmetric precharged flip flop Grant 7,301,373 - Bailey , et al. November 27, 2	2007-11-27
Expanded comparator for control of digital delay lines in a delay locked loop or phase locked loop Grant 7,079,615 - Bailey July 18, 2	2006-07-18
Low threshold voltage silicon-on-insulator clock gates Grant 6,624,663 - Bailey , et al. September 23, 2	2003-09-23
Expanded comparator for control of digital delay lines in a delay locked loop or phase locked loop App 20030099319 - Bailey, Daniel William	2003-05-29
Low threshold voltage silicon-on-insulator clock gates App 20030080782 - Bailey, Daniel William ; et al.	2003-05-01
Conditional Clock Gate That Reduces Data Dependent Loading On A Clock Network App 20030025529 - Bailey, Daniel William	2003-02-06
Multi-ported SRAM cell with shared bit and word lines and separate read and write ports Grant 6,473,334 - Bailey , et al. October 29, 2	2002-10-29

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.