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name:-0.021047115325928
name:-0.020052909851074
name:-0.01093602180481
BAE; SEUNGJUN Patent Filings

BAE; SEUNGJUN

Patent Applications and Registrations

Patent applications and USPTO patent grants for BAE; SEUNGJUN.The latest application filed is for "memory device and operation method thereof".

Company Profile
11.19.20
  • BAE; SEUNGJUN - Hwaseong-si KR
  • Bae; Seungjun - Hwasung-si KR
  • Bae; Seungjun - Daejeon-si KR
  • Bae; Seungjun - Daegu KR
  • Bae; Seungjun - Daejeon KR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Memory Device And Operation Method Thereof
App 20220093161 - EOM; YOON-JOO ;   et al.
2022-03-24
Memory device and method with data input
Grant 11,195,571 - Eom , et al. December 7, 2
2021-12-07
Memory device and divided clock correction method thereof
Grant 11,056,158 - Kang , et al. July 6, 2
2021-07-06
Test circuits for monitoring NBTI or PBTI
Grant 10,969,420 - Kwon , et al. April 6, 2
2021-04-06
Semiconductor memory device and detection clock pattern generating method thereof
Grant 10,777,246 - Doo , et al. Sept
2020-09-15
Memory system for adjusting clock frequency
Grant 10,734,043 - Kim , et al.
2020-08-04
Semiconductor memory device, memory system, and refresh method thereof
Grant 10,692,561 - Jang , et al.
2020-06-23
Semiconductor Memory Device And Detection Clock Pattern Generating Method Thereof
App 20200168259 - Doo; Su Yeon ;   et al.
2020-05-28
Memory device and operation method thereof
Grant 10,666,467 - Kwon , et al.
2020-05-26
Semiconductor memory device and detection clock pattern generating method thereof
Grant 10,593,387 - Doo , et al.
2020-03-17
Memory Device And Divided Clock Correction Method Thereof
App 20200013441 - Kang; Dong-Seok ;   et al.
2020-01-09
Memory device and divided clock correction method thereof
Grant 10,453,504 - Kang , et al. Oc
2019-10-22
Memory System For Adjusting Clock Frequency
App 20190180797 - KIM; YOUNG-JU ;   et al.
2019-06-13
Semiconductor Memory Device And Detection Clock Pattern Generating Method Thereof
App 20190180806 - DOO; SU YEON ;   et al.
2019-06-13
Memory Device And Operation Method Thereof
App 20190164594 - EOM; YOON-JOO ;   et al.
2019-05-30
Memory Device And Operation Method Thereof
App 20190158320 - Kwon; Hye Jung ;   et al.
2019-05-23
Test Circuits For Monitoring Nbti Or Pbti
App 20190137563 - KWON; Hye Jung ;   et al.
2019-05-09
Semiconductor Memory Device, Memory System, And Refresh Method Thereof
App 20190139596 - JANG; Min-soo ;   et al.
2019-05-09
Semiconductor memory device having detection clock patterns phase-inverted from each other and detection clock generating method thereof
Grant 10,236,045 - Doo , et al.
2019-03-19
Memory Device And Divided Clock Correction Method Thereof
App 20180090186 - Kang; Dong-Seok ;   et al.
2018-03-29
Output circuit for implementing high speed data transmition
Grant 9,355,706 - Ahn , et al. May 31, 2
2016-05-31
Output Circuit For Implementing High Speed Data Transmition
App 20150036448 - AHN; MINSU ;   et al.
2015-02-05
Semiconductor Memory Device And Detection Clock Pattern Generating Method Thereof
App 20140086002 - DOO; SU YEON ;   et al.
2014-03-27
Transmitter having source follower voltage regulator
Grant 8,542,036 - Bae , et al. September 24, 2
2013-09-24
Pseudo-open drain type output driver having de-emphasis function, semiconductor memory device, and control method thereof
Grant 8,391,088 - Sohn , et al. March 5, 2
2013-03-05
Pseudo-open Drain Type Output Driver Having De-emphasis Function, Semiconductor Memory Device, And Control Method Thereof
App 20120113732 - Sohn; Youngsoo ;   et al.
2012-05-10
Transmitter Having Source Follower Voltage Regulator
App 20120112799 - BAE; SEUNGJUN ;   et al.
2012-05-10
Internal clock signal generating circuits including frequency division and phase control and related methods, systems, and devices
Grant 8,055,930 - Bae , et al. November 8, 2
2011-11-08
Phase locked loop circuit, method of operating phase locked loop circuit and semiconductor memory device including phase locked loop circuit
Grant 8,026,749 - Bae , et al. September 27, 2
2011-09-27
Integrated circuit memory devices including delayed clock inputs for input/output buffers and related systems and methods
Grant 7,903,499 - Kim , et al. March 8, 2
2011-03-08
Method Of Transferring And Aligning Of Input Data And Memory Device Using The Same
App 20100228932 - BAE; SEUNGJUN ;   et al.
2010-09-09
Asymmetric Charge Pump And Phase Locked Loops Having The Same
App 20100207673 - KIM; Young-Sik ;   et al.
2010-08-19
AC coupling circuits including resistive feedback and related methods and devices
Grant 7,778,097 - Chung , et al. August 17, 2
2010-08-17
Phase locked loop circuit, method of operating phase locked loop circuit and semiconductor memory device including phase locked loop circuit
App 20100123498 - Bae; Seungjun ;   et al.
2010-05-20
AC Coupling Circuits Including Resistive Feedback and Related Methods and Devices
App 20090179700 - Chung; Daehyun ;   et al.
2009-07-16
Integrated Circuit Memory Devices Including Delayed Clock Inputs for Input/Output Buffers and Related Systems and Methods
App 20090154256 - Kim; JinGook ;   et al.
2009-06-18
Internal Clock Signal Generating Circuits Including Frequency Division and Phase Control and Related Methods, Systems, and Devices
App 20090100285 - Bae; Seungjun ;   et al.
2009-04-16

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