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name:-0.02468204498291
name:-0.016732931137085
name:-0.0049920082092285
Badalone; Riccardo Patent Filings

Badalone; Riccardo

Patent Applications and Registrations

Patent applications and USPTO patent grants for Badalone; Riccardo.The latest application filed is for "system and method for providing a configurable timing control for a memory system".

Company Profile
5.17.22
  • Badalone; Riccardo - St. Lazare CA
  • Badalone; Riccardo - Saint-Lazare CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
System and method of interfacing co-processors and input/output devices via a main memory system
Grant 11,422,749 - Takefman , et al. August 23, 2
2022-08-23
System And Method For Providing A Configurable Timing Control For A Memory System
App 20210407561 - Takefman; Michael L. ;   et al.
2021-12-30
System And Method Of Interfacing Co-processors And Input/output Devices Via A Main Memory System
App 20210318835 - Takefman; Michael L. ;   et al.
2021-10-14
System And Method For Privacy-aware Analysis Of Video Streams
App 20210240851 - Badalone; Riccardo ;   et al.
2021-08-05
System and method for providing a configurable timing control for a memory system
Grant 11,062,743 - Takefman , et al. July 13, 2
2021-07-13
System and method of interfacing co-processors and input/output devices via a main memory system
Grant 10,942,682 - Takefman , et al. March 9, 2
2021-03-09
System And Method For Scalable Cloud-Robotics Based Face Recognition And Face Analysis
App 20210049349 - FAROKHI; Soodeh ;   et al.
2021-02-18
System And Method Of Interfacing Co-processors And Input/output Devices Via A Main Memory System
App 20210011661 - Takefman; Michael L. ;   et al.
2021-01-14
System And Method For Providing A Configurable Timing Control For A Memory System
App 20200265876 - TAKEFMAN; MICHAEL L. ;   et al.
2020-08-20
System and method of interfacing co-processors and input/output devices via a main memory system
Grant 10,725,704 - Takefman , et al.
2020-07-28
System and method for providing a configurable timing control for a memory system
Grant 10,580,465 - Takefman , et al.
2020-03-03
System And Method Of Interfacing Co-processors And Input/output Devices Via A Main Memory System
App 20190212948 - TAKEFMAN; Michael L. ;   et al.
2019-07-11
System And Method For Providing A Configurable Timing Control For A Memory System
App 20190043541 - TAKEFMAN; MICHAEL L. ;   et al.
2019-02-07
System and method of interfacing co-processors and input/output devices via a main memory system
Grant 10,168,954 - Takefman , et al. J
2019-01-01
System and method for providing an address cache for memory map learning
Grant 9,779,020 - Takefman , et al. October 3, 2
2017-10-03
System and method for unlocking additional functions of a module
Grant 9,575,908 - Takefman , et al. February 21, 2
2017-02-21
System and method for providing a command buffer in a memory system
Grant 9,552,175 - Takefman , et al. January 24, 2
2017-01-24
System And Method Of Interfacing Co-processors And Input/output Devices Via A Main Memory System
App 20160378404 - TAKEFMAN; MICHAEL L. ;   et al.
2016-12-29
System and method of interfacing co-processors and input/output devices via a main memory system
Grant 9,444,495 - Takefman , et al. September 13, 2
2016-09-13
System And Method For Mirroring A Volatile Memory Of A Computer System
App 20160041917 - Trojanowski; Bart ;   et al.
2016-02-11
System And Method For Booting From A Non-volatile Memory
App 20150347151 - Takefman; Michael L. ;   et al.
2015-12-03
System And Method Of Accessing And Controlling A Co-processor And/or Input/output Device Via Remote Direct Memory Access
App 20150326684 - Takefman; Michael L. ;   et al.
2015-11-12
System And Method For Providing A Configurable Timing Control For A Memory System
App 20150310898 - TAKEFMAN; MICHAEL L. ;   et al.
2015-10-29
System and Method of Interfacing Co-Processors and Input/Output Devices via a Main Memory System
App 20150309959 - Takefman; Michael L. ;   et al.
2015-10-29
System and method of interfacing co-processors and input/output devices via a main memory system
Grant 8,972,805 - Takefman , et al. March 3, 2
2015-03-03
System And Method For Providing A Command Buffer In A Memory System
App 20140237205 - Takefman; Michael L. ;   et al.
2014-08-21
System And Method For Providing An Address Cache For Memory Map Learning
App 20140237157 - Takefman; Michael L. ;   et al.
2014-08-21
System and Method of Interfacing Co-Processors and Input/Output Devices via a Main Memory System
App 20140223262 - Takefman; Michael L. ;   et al.
2014-08-07
System and method of interfacing co-processors and input/output devices via a main memory system
Grant 8,713,379 - Takefman , et al. April 29, 2
2014-04-29
Bang-bang phase detector with sub-rate clock
Grant 8,315,349 - Badalone November 20, 2
2012-11-20
System And Method Of Interfacing Co-processors And Input/output Devices Via A Main Memory System
App 20120204079 - Takefman; Michael L. ;   et al.
2012-08-09
Receiver-based adaptive equalizer with pre-cursor compensation
Grant 8,081,677 - Badalone December 20, 2
2011-12-20
Fully adaptive equalization for high loss communications channels
Grant 7,940,839 - Lapointe , et al. May 10, 2
2011-05-10
Programmable asynchronous first-in-first-out (FIFO) structure with merging capability
Grant 7,796,652 - Reitlingshoefer , et al. September 14, 2
2010-09-14
Bang-bang Phase Detector With Sub-rate Clock
App 20090110136 - BADALONE; Riccardo
2009-04-30
Fully Adaptive Equalization for High Loss Communications Channels
App 20080260016 - Lapointe; Marcel ;   et al.
2008-10-23
Receiver-Based Adaptive Equalizer with Pre-Cursor Compensation
App 20080240223 - Badalone; Riccardo
2008-10-02
Programmable asynchronous first-in-first-out (FIFO) structure with merging capability
App 20070258491 - Reitlingshoefer; Claus ;   et al.
2007-11-08

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