Babaian; Boris A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Babaian; Boris A..The latest application filed is for "single-chip multiprocessor with clock cycle-precise program scheduling of parallel execution".

Company Profile

0.12.9

Babaian; Boris A. - Moscow RU

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Single-chip multiprocessor with clock cycle-precise program scheduling of parallel execution Grant 8,261,250 - Babaian , et al. September 4, 2	2012-09-04
Single-chip Multiprocessor With Clock Cycle-precise Program Scheduling Of Parallel Execution App 20110107067 - Babaian; Boris A. ; et al.	2011-05-05
Single-chip multiprocessor with clock cycle-precise program scheduling of parallel execution Grant 7,895,587 - Babaian , et al. February 22, 2	2011-02-22
Single-chip multiprocessor with clock cycle-precise program scheduling of parallel execution App 20070006193 - Babaian; Boris A. ; et al.	2007-01-04
Single-chip multiprocessor with cycle-precise program scheduling of parallel execution Grant 7,143,401 - Babaian , et al. November 28, 2	2006-11-28
Method of using a plurality of virtual memory spaces for providing efficient binary compatibility between a plurality of source architectures and a single target architecture Grant 7,069,412 - Babaian , et al. June 27, 2	2006-06-27
Method and apparatus for preserving precise exceptions in binary translated code Grant 7,065,750 - Babaian , et al. June 20, 2	2006-06-20
Method for prioritizing operations within a pipelined microprocessor based upon required results Grant 7,003,650 - Babaian , et al. February 21, 2	2006-02-21
Method for fast execution of translated binary code utilizing database cache for low-level code correspondence Grant 6,820,255 - Babaian , et al. November 16, 2	2004-11-16
Method for emulating hardware features of a foreign architecture in a host operating system environment Grant 6,732,220 - Babaian , et al. May 4, 2	2004-05-04
Method of using a plurality of virtual memory spaces for providing efficient binary compatibility between a plurality of source architectures and a single target architecture App 20040024953 - Babaian, Boris A. ; et al.	2004-02-05
Critical path optimization--unload hard extended scalar block Grant 6,584,611 - Babaian , et al. June 24, 2	2003-06-24
Integrity of tagged data Grant 6,549,903 - Babaian , et al. April 15, 2	2003-04-15
Method and apparatus for preserving precise exceptions in binary translated code App 20020092002 - Babaian, Boris A. ; et al.	2002-07-11
Method for removing dependent store-load pair from critical path App 20020066090 - Babaian, Boris A. ; et al.	2002-05-30
Method for fast execution of translated binary code utilizing database cache for low-level code correspondence App 20020059268 - Babaian, Boris A. ; et al.	2002-05-16
Method for effective binary translation between different instruction sets using emulated supervisor flag and multiple page tables App 20020046305 - Babaian, Boris A. ; et al.	2002-04-18
Critical path optimization - unload hard extended scalar block App 20010052120 - Babaian, Boris A. ; et al.	2001-12-13
Single-chip multiprocessor with cycle-precise program scheduling of parallel execution App 20010042189 - Babaian, Boris A. ; et al.	2001-11-15
Architectural support for execution control of prologue and eplogue periods of loops in a VLIW processor Grant 5,794,029 - Babaian , et al. August 11, 1	1998-08-11
Wide instruction word architecture central processor Grant 5,418,975 - Babaian , et al. May 23, 1	1995-05-23

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