Azimi; Hamid R.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Azimi; Hamid R..The latest application filed is for "methods of forming panel embedded die structures".
- Azimi; Hamid R. - Chandler AZ
- Azimi; Hamid R - Chandler AZ US
| Patent | Date |
|---|---|
| Methods Of Forming Panel Embedded Die Structures App 20160190027 - Manepalli; Rahul N. ; et al. | 2016-06-30 |
| Method of forming molded panel embedded die structure Grant 9,312,233 - Manepalli , et al. April 12, 2 | 2016-04-12 |
| Forming functionalized carrier structures with coreless packages Grant 9,257,380 - Nalla , et al. February 9, 2 | 2016-02-09 |
| Forming Functionalized Carrier Structures With Coreless Packages App 20150179559 - Nalla; Ravi K. ; et al. | 2015-06-25 |
| Forming functionalized carrier structures with coreless packages Grant 8,987,065 - Nailla , et al. March 24, 2 | 2015-03-24 |
| Methods Of Forming Molded Panel Embedded Die Structures App 20150003000 - MANEPALLI; Rahul N. ; et al. | 2015-01-01 |
| Forming Functionalized Carrier Structures With Coreless Packages App 20140084467 - Nalla; Ravi K. ; et al. | 2014-03-27 |
| Forming functionalized carrier structures with coreless packages Grant 8,618,652 - Nalla , et al. December 31, 2 | 2013-12-31 |
| Microelectronic Package And Method Of Manufacturing Same App 20110318850 - Guzek; John S. ; et al. | 2011-12-29 |
| Microelectronic package and method of manufacturing same Grant 8,035,218 - Guzek , et al. October 11, 2 | 2011-10-11 |
| Microelectronic package and method of manufacturing same App 20110101516 - Guzek; John S. ; et al. | 2011-05-05 |
| Integrated Circuit Die/package Interconnect App 20080096323 - Vandentop; Gilroy J. ; et al. | 2008-04-24 |
| Integrated circuit die/package interconnect Grant 7,330,357 - Vandentop , et al. February 12, 2 | 2008-02-12 |
| Integrated circuit die/package interconnect App 20050063164 - Vandentop, Gilroy J. ; et al. | 2005-03-24 |
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