| Patent | Date |
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Logical register recovery within a processor
Grant 11,360,779 - Battle , et al. June 14, 2 | 2022-06-14 |
Parallel Slice Processor Having A Recirculating Load-store Queue For Fast Deallocation Of Issue Queue Entries
App 20210406023 - Ayub; Salma ; et al. | 2021-12-30 |
System and handling of register data in processors
Grant 11,188,332 - Battle , et al. November 30, 2 | 2021-11-30 |
Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries
Grant 11,150,907 - Ayub , et al. October 19, 2 | 2021-10-19 |
Redistribution of architected states for a processor register file
Grant 11,144,319 - Battle , et al. October 12, 2 | 2021-10-12 |
High bandwidth logical register flush recovery
Grant 11,068,267 - Battle , et al. July 20, 2 | 2021-07-20 |
Logical Register Recovery Within A Processor
App 20210089322 - Battle; Steven J. ; et al. | 2021-03-25 |
Logical register recovery within a processor
Grant 10,949,213 - Battle , et al. March 16, 2 | 2021-03-16 |
Fast multi-width instruction issue in parallel slice processor
Grant 10,942,745 - Ayub , et al. March 9, 2 | 2021-03-09 |
System And Handling Of Register Data In Processors
App 20200356369 - Battle; Steven J. ; et al. | 2020-11-12 |
Most favored branch issue
Grant 10,831,492 - Ayub , et al. November 10, 2 | 2020-11-10 |
High Bandwidth Logical Register Flush Recovery
App 20200341767 - Battle; Steven J. ; et al. | 2020-10-29 |
Operation of a multi-slice processor implementing load-hit-store handling
Grant 10,740,107 - Ayub , et al. A | 2020-08-11 |
Logical Register Recovery Within A Processor
App 20200183700 - Battle; Steven J. ; et al. | 2020-06-11 |
Variable latency pipe for interleaving instruction tags in a microprocessor
Grant 10,649,779 - Ayub , et al. | 2020-05-12 |
Variable latency pipe for interleaving instruction tags in a microprocessor
Grant 10,613,868 - Ayub , et al. | 2020-04-07 |
Most Favored Branch Issue
App 20200012496 - Ayub; Salma ; et al. | 2020-01-09 |
Broadcasting messages between execution slices for issued instructions indicating when execution results are ready
Grant 10,445,100 - Ayub , et al. Oc | 2019-10-15 |
Method and apparatus for managing a speculative transaction in a processing unit
Grant 10,255,071 - Ayub , et al. | 2019-04-09 |
Operation of a multi-slice processor with reduced flush and restore latency
Grant 10,248,421 - Ayub , et al. | 2019-04-02 |
Operation of a multi-slice processor with reduced flush and restore latency
Grant 10,241,790 - Ayub , et al. | 2019-03-26 |
Fast Multi-width Instruction Issue In Parallel Slice Processor
App 20190026113 - Ayub; Salma ; et al. | 2019-01-24 |
Parallel Slice Processor Having A Recirculating Load-store Queue For Fast Deallocation Of Issue Queue Entries
App 20180336036 - Ayub; Salma ; et al. | 2018-11-22 |
Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries
Grant 10,133,576 - Ayub , et al. November 20, 2 | 2018-11-20 |
Fast multi-width instruction issue in parallel slice processor
Grant 10,120,693 - Ayub , et al. November 6, 2 | 2018-11-06 |
Fast Multi-width Instruction Issue In Parallel Slice Processor
App 20180217843 - Ayub; Salma ; et al. | 2018-08-02 |
Fast multi-width instruction issue in parallel slice processor
Grant 9,996,359 - Ayub , et al. June 12, 2 | 2018-06-12 |
Techniques For Implementing Store Instructions In A Multi-slice Processor Architecture
App 20170364356 - AYUB; SALMA ; et al. | 2017-12-21 |
Transmitting Data Between Execution Slices Of A Multi-slice Processor
App 20170357513 - AYUB; SALMA ; et al. | 2017-12-14 |
Operation Of A Multi-slice Processor Implementing Load-hit-store Handling
App 20170351522 - AYUB; SALMA ; et al. | 2017-12-07 |
Fast Multi-width Instruction Issue In Parallel Slice Processor
App 20170293489 - Ayub; Salma ; et al. | 2017-10-12 |
Distributed history buffer flush and restore handling in a parallel slice design
Grant 9,747,217 - Ayub , et al. August 29, 2 | 2017-08-29 |
Distributed history buffer flush and restore handling in a parallel slice design
Grant 9,740,620 - Ayub , et al. August 22, 2 | 2017-08-22 |
Operation Of A Multi-slice Processor With Reduced Flush And Restore Latency
App 20170168826 - AYUB; SALMA ; et al. | 2017-06-15 |
Operation Of A Multi-slice Processor With Reduced Flush And Restore Latency
App 20170168818 - AYUB; Salma ; et al. | 2017-06-15 |
Method And Apparatus For Managing A Speculative Transaction In A Processing Unit
App 20170109168 - AYUB; Salma ; et al. | 2017-04-20 |
Variable Latency Pipe For Interleaving Instruction Tags In A Microprocessor
App 20170003971 - Ayub; Salma ; et al. | 2017-01-05 |
Variable Latency Pipe For Interleaving Instruction Tags In A Microprocessor
App 20170003969 - AYUB; Salma ; et al. | 2017-01-05 |
Distributed History Buffer Flush and Restore Handling in a Parallel Slice Design
App 20160328330 - Ayub; Salma ; et al. | 2016-11-10 |
Distributed History Buffer Flush and Restore Handling in a Parallel Slice Design
App 20160328329 - Ayub; Salma ; et al. | 2016-11-10 |
Parallel Slice Processor Having A Recirculating Load-store Queue For Fast Deallocation Of Issue Queue Entries
App 20160202986 - Ayub; Salma ; et al. | 2016-07-14 |
Parallel Slice Processing Method Using A Recirculating Load-store Queue For Fast Deallocation Of Issue Queue Entries
App 20160202988 - Ayub; Salma ; et al. | 2016-07-14 |
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