loadpatents
name:-0.029728889465332
name:-0.028048038482666
name:-0.0034527778625488
Austin; Todd Michael Patent Filings

Austin; Todd Michael

Patent Applications and Registrations

Patent applications and USPTO patent grants for Austin; Todd Michael.The latest application filed is for "error recovery within integrated circuit".

Company Profile
2.25.21
  • Austin; Todd Michael - Ann Arbor MI
  • Austin; Todd Michael - Madison WI
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Error recovery within integrated circuit
Grant 10,579,463 - Flautner , et al.
2020-03-03
Error recovery within integrated circuit
Grant 10,572,334 - Flautner , et al. Feb
2020-02-25
Field repairable logic
Grant 9,645,882 - Bertacco , et al. May 9, 2
2017-05-09
Error Recovery within Integrated Circuit
App 20160378588 - FLAUTNER; KRISZTIAN ;   et al.
2016-12-29
Error recovery within integrated circuit
Grant 9,448,875 - Flautner , et al. September 20, 2
2016-09-20
Error Recovery Within Integrated Circuit
App 20160034339 - FLAUTNER; Krisztian ;   et al.
2016-02-04
Error recovery within integrated circuit
Grant 9,164,842 - Flautner , et al. October 20, 2
2015-10-20
Error Recovery Within Integrated Circuit
App 20140181581 - FLAUTNER; Krisztian ;   et al.
2014-06-26
Error recovery within integrated circuit
Grant 8,650,470 - Flautner , et al. February 11, 2
2014-02-11
Error Recovery Within Integrated Circuit
App 20140013178 - FLAUTNER; Krisztian ;   et al.
2014-01-09
Error recover within processing stages of an integrated circuit
Grant 8,407,537 - Flautner , et al. March 26, 2
2013-03-26
Microprocessor and method for detecting faults therein
Grant 8,341,473 - Bertacco , et al. December 25, 2
2012-12-25
Error recovery within processing stages of an integrated circuit
Grant 8,185,786 - Flautner , et al. May 22, 2
2012-05-22
Microprocessor And Method For Detecting Faults Therein
App 20120011422 - Bertacco; Valeria ;   et al.
2012-01-12
Error recovery within processing stages of an integrated circuit
Grant 8,060,814 - Blaauw , et al. November 15, 2
2011-11-15
Microprocessor and method for detecting faults therein
Grant 8,051,368 - Bertacco , et al. November 1, 2
2011-11-01
Microprocessor And Method For Detecting Faults Therein
App 20110214014 - Bertacco; Valeria ;   et al.
2011-09-01
Microprocessor and method for detecting faults therein
Grant 7,966,538 - Bertacco , et al. June 21, 2
2011-06-21
Error recover within processing stages of an integrated circuit
App 20110126051 - Flautner; Krisztian ;   et al.
2011-05-26
Error recovery within integrated circuit
App 20110107166 - Flautner; Krisztian ;   et al.
2011-05-05
Error recovery within processing stages of an integrated circuit
App 20110093737 - Flautner; Krisztian ;   et al.
2011-04-21
Integrated circuit with error correction mechanisms to offset narrow tolerancing
Grant 7,701,240 - Flautner , et al. April 20, 2
2010-04-20
Error recovery within processing stages of an integrated circuit
App 20100058107 - Blaauw; David Theodore ;   et al.
2010-03-04
Error detection and recovery within processing stages of an integrated circuit
Grant 7,650,551 - Flautner , et al. January 19, 2
2010-01-19
Microprocessor And Method For Detecting Faults Therein
App 20090138772 - Bertacco; Valeria ;   et al.
2009-05-28
Field Repairable Logic
App 20090089615 - Bertacco; Valeria ;   et al.
2009-04-02
Recovery from errors in a data processing apparatus
Grant 7,401,273 - Lee , et al. July 15, 2
2008-07-15
Systematic and random error detection and recovery within processing stages of an integrated circuit
Grant 7,337,356 - Mudge , et al. February 26, 2
2008-02-26
Data retention latch provision within integrated circuits
Grant 7,310,755 - Mudge , et al. December 18, 2
2007-12-18
Error detection and recovery within processing stages of an integrated circuit
App 20070288798 - Flautner; Krisztian ;   et al.
2007-12-13
Error detection and recovery within processing stages of an integrated circuit
Grant 7,278,080 - Flautner , et al. October 2, 2
2007-10-02
Systematic and random error detection and recovery within processing stages of an integrated circuit
Grant 7,162,661 - Mudge , et al. January 9, 2
2007-01-09
Integrated circuit with error correction mechanisms to offset narrow tolerancing
App 20060200699 - Flautner; Krisztian ;   et al.
2006-09-07
Memory system having fast and slow data reading mechanisms
Grant 7,072,229 - Austin , et al. July 4, 2
2006-07-04
Memory system having fast and slow data reading mechanisms
App 20060018171 - Austin; Todd Michael ;   et al.
2006-01-26
Recovery from errors in a data processing apparatus
App 20050207521 - Lee, Seokwoo ;   et al.
2005-09-22
Memory system having fast and slow data reading mechanisms
Grant 6,944,067 - Mudge , et al. September 13, 2
2005-09-13
Systematic and random error detection and recovery within processing stages of an integrated circuit
App 20050022094 - Mudge, Trevor Nigel ;   et al.
2005-01-27
Data retention latch provision within integrated circuits
App 20040239397 - Mudge, Trevor Nigel ;   et al.
2004-12-02
Systematic and random error detection and recovery within processing stages of an integrated circuit
App 20040243893 - Mudge, Trevor Nigel ;   et al.
2004-12-02
Memory system having fast and slow data reading mechanisms
App 20040223386 - Mudge, Trevor Nigel ;   et al.
2004-11-11
Error detection and recovery within processing stages of an integrated circuit
App 20040199821 - Flautner, Krisztian ;   et al.
2004-10-07
Method for detecting computer memory access errors
Grant 5,644,709 - Austin July 1, 1
1997-07-01

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