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name:-0.012712955474854
name:-0.0074710845947266
name:-0.0010080337524414
Au; Mario Fulam Patent Filings

Au; Mario Fulam

Patent Applications and Registrations

Patent applications and USPTO patent grants for Au; Mario Fulam.The latest application filed is for "high-performance level shifter".

Company Profile
0.6.6
  • Au; Mario Fulam - Fremont CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Output drive circuit that accommodates variable supply voltages
Grant 7,586,343 - Pilling , et al. September 8, 2
2009-09-08
High-speed, low-power level shifter for mixed signal-level environments
Grant 7,554,379 - Pilling , et al. June 30, 2
2009-06-30
High-performance level shifter
App 20080204109 - Pilling; David J. ;   et al.
2008-08-28
Output drive circuit that accommodates variable supply voltages
App 20070285135 - Pilling; David ;   et al.
2007-12-13
Output drive circuit that accommodates variable supply voltages
Grant 7,224,195 - Pilling , et al. May 29, 2
2007-05-29
FIFO memory devices having write and read control circuits that support x4N, x2N and xN data widths during DDR and SDR modes of operation
Grant 7,158,440 - Duh , et al. January 2, 2
2007-01-02
Output drive circuit that accommodates variable supply voltages
App 20050184768 - Pilling, David ;   et al.
2005-08-25
FIFO memory devices having write and read control circuits that support x4N, x2N and xN data widths during DDR and SDR modes of operation
App 20050041450 - Duh, Jiann-Jeng ;   et al.
2005-02-24
Fifo memory devices that support all four combinations of DDR or SDR write modes with DDR or SDR read modes
Grant 6,795,360 - Duh , et al. September 21, 2
2004-09-21
FIFO memory devices that support all combinations of DDR and SDR read and write modes
Grant 6,778,454 - Duh , et al. August 17, 2
2004-08-17
FIFO memory devices that support all combinations of DDR and SDR read and write modes
App 20030206475 - Duh, Jiann-Jeng ;   et al.
2003-11-06
FIFO memory devices having single data rate (SDR) and dual data rate (DDR) capability
App 20030112685 - Duh, Jiann-Jeng ;   et al.
2003-06-19

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