AU; Hinmeng

Patent Applications and Registrations

Patent applications and USPTO patent grants for AU; Hinmeng.The latest application filed is for "multi-chip package and method of providing die-to-die interconnects in same".

Company Profile

6.8.8

AU; Hinmeng - Phoenix AZ
Au; Hinmeng - San Jose CA US

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Multi-chip Package And Method Of Providing Die-to-die Interconnects In Same App 20210134726 - BRAUNISCH; Henning ; et al.	2021-05-06
Multi-chip package and method of providing die-to-die interconnects in same Grant 10,923,429 - Braunisch , et al. February 16, 2	2021-02-16
Multi-chip Package And Method Of Providing Die-to-die Interconnects In Same App 20200357747 - BRAUNISCH; Henning ; et al.	2020-11-12
Multi-chip package and method of providing die-to-die interconnects in same Grant 10,763,216 - Braunisch , et al. Sep	2020-09-01
Multi-chip Package And Method Of Providing Die-to-die Interconnects In Same App 20200075493 - BRAUNISCH; Henning ; et al.	2020-03-05
Multi-chip package and method of providing die-to-die interconnects in same Grant 10,510,669 - Braunisch , et al. Dec	2019-12-17
Multi-chip Package And Method Of Providing Die-to-die Interconnects In Same App 20180145031 - BRAUNISCH; Henning ; et al.	2018-05-24
Wafer integrated optical sub-modules Grant 8,532,449 - Mohammed , et al. September 10, 2	2013-09-10
Method to form lateral pad on edge of wafer Grant 8,383,949 - Mohammed , et al. February 26, 2	2013-02-26
Multi-chip Package And Method Of Providing Die-to-die Interconnects In Same App 20120261838 - Braunisch; Henning ; et al.	2012-10-18
Multi-chip package and method of providing die-to-die interconnects in same Grant 8,227,904 - Braunisch , et al. July 24, 2	2012-07-24
Wafer Integrated Optical Sub-modules App 20110274395 - Edris; Mohammed M. ; et al.	2011-11-10
Method To Form Lateral Pad On Edge Of Wafer App 20110155435 - MOHAMMED; EDRIS M. ; et al.	2011-06-30
Multi-chip package and method of providing die-to-die interconnects in same App 20100327424 - Braunisch; Henning ; et al.	2010-12-30

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.