Asra; Ram
Patent Applications and Registrations
Patent applications and USPTO patent grants for Asra; Ram.The latest application filed is for "logic layout with reduced area and method of making the same".
- Asra; Ram - Clifton Park NY
- Asra; Ram - Mumbai IN
- Asra; Ram - Malta NY
| Patent | Date |
|---|---|
| Logic layout with reduced area and method of making the same Grant 10,373,942 - Asra , et al. | 2019-08-06 |
| Tunnel field effect transistors Grant 10,374,068 - Gossner , et al. | 2019-08-06 |
| Methods, apparatus and system for threshold voltage control in FinFET devices Grant 10,325,824 - Togo , et al. | 2019-06-18 |
| Logic Layout With Reduced Area And Method Of Making The Same App 20190172822 - ASRA; Ram ; et al. | 2019-06-06 |
| Methods, Apparatus And System For Threshold Voltage Control In Finfet Devices App 20180358272 - Togo; Mitsuhiro ; et al. | 2018-12-13 |
| Tunnel Finfet With Self-aligned Gate App 20180254340 - NOWAK; EDWARD J. ; et al. | 2018-09-06 |
| Tunnel Finfet With Self-aligned Gate App 20180138307 - NOWAK; EDWARD J. ; et al. | 2018-05-17 |
| Tunnel Field Effect Transistors App 20170125556 - Gossner; Harald ; et al. | 2017-05-04 |
| Tunnel field effect transistors Grant 9,577,079 - Gossner , et al. February 21, 2 | 2017-02-21 |
| Methods of forming a transistor device on a bulk substrate and the resulting device Grant 8,921,188 - Asra December 30, 2 | 2014-12-30 |
| Semiconductor devices Grant 8,878,234 - Gossner , et al. November 4, 2 | 2014-11-04 |
| Methods Of Forming A Transistor Device On A Bulk Substrate And The Resulting Device App 20140217544 - Asra; Ram | 2014-08-07 |
| Semiconductor Devices App 20130181256 - Gossner; Harald ; et al. | 2013-07-18 |
| Semiconductor devices Grant 8,405,121 - Gossner , et al. March 26, 2 | 2013-03-26 |
| Tunnel Field Effect Transistors App 20110147838 - Gossner; Harald ; et al. | 2011-06-23 |
| Semiconductor Devices App 20100200916 - Gossner; Harald ; et al. | 2010-08-12 |
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