Ashida; Tsutomu
Patent Applications and Registrations
Patent applications and USPTO patent grants for Ashida; Tsutomu.The latest application filed is for "method for fabricating semiconductor device".
- Ashida; Tsutomu - Yamatokoriyama JP
- Ashida, Tsutomu - Yamatokoriyama-shi JP
| Patent | Date |
|---|---|
| Method for fabricating semiconductor device Grant 7,195,948 - Ashida March 27, 2 | 2007-03-27 |
| Method for fabricating semiconductor device App 20050009222 - Ashida, Tsutomu | 2005-01-13 |
| CMOS semiconductor circuit with reverse bias applied for reduced power consumption Grant 6,630,717 - Ashida October 7, 2 | 2003-10-07 |
| Integrated CMOS semiconductor circuit App 20010048325 - Ashida, Tsutomu | 2001-12-06 |
| High voltage MOS transistor Grant 4,947,232 - Ashida , et al. August 7, 1 | 1990-08-07 |
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