Asher; David H.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Asher; David H..The latest application filed is for "inter-chip interconnect protocol for a multi-chip system".

Company Profile

0.22.16

Asher; David H. - Sutton MA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Shared mid-level data cache Grant 11,093,405 - Mukherjee , et al. August 17, 2	2021-08-17
Mid-level instruction cache Grant 11,036,643 - Asher , et al. June 15, 2	2021-06-15
Network processor with distributed trace buffers Grant 9,612,934 - Dobbie , et al. April 4, 2	2017-04-04
Method and apparatus for conditional storing of data using a compare-and-swap based approach Grant 9,390,023 - Kessler , et al. July 12, 2	2016-07-12
Inter-chip interconnect protocol for a multi-chip system Grant 9,372,800 - Akkawi , et al. June 21, 2	2016-06-21
Multi-core interconnect in a network processor Grant 9,330,002 - Kessler , et al. May 3, 2	2016-05-03
Method and apparatus for managing write back cache Grant 9,141,548 - Asher , et al. September 22, 2	2015-09-22
Multi-core Network Processor Interconnect With Multi-node Connection App 20150254182 - Asher; David H. ; et al.	2015-09-10
Inter-chip Interconnect Protocol For A Multi-chip System App 20150254183 - Akkawi; Isam ; et al.	2015-09-10
Method And Apparatus For Conditional Storing Of Data Using A Compare-And-Swap Based Approach App 20150100737 - Kessler; Richard E. ; et al.	2015-04-09
Method and Apparatus for Managing Write Back Cache App 20140317353 - Asher; David H. ; et al.	2014-10-23
Input output bridging Grant 8,595,401 - Sanzone , et al. November 26, 2	2013-11-26
Input Output Bridging App 20130282942 - Sanzone; Robert A. ; et al.	2013-10-24
Input output bridging Grant 8,473,658 - Sanzone , et al. June 25, 2	2013-06-25
Multi-core Interconnect In A Network Processor App 20130111141 - Kessler; Richard E. ; et al.	2013-05-02
Network Processor With Distributed Trace Buffers App 20130111073 - Dobbie; Bradley D. ; et al.	2013-05-02
Input Output Bridging App 20130103870 - Sanzone; Robert A. ; et al.	2013-04-25
Local scratchpad and data caching system Grant 7,941,585 - Asher , et al. May 10, 2	2011-05-10
Store instruction ordering for multi-core processor Grant 7,606,998 - Asher , et al. October 20, 2	2009-10-20
Method and system for absorbing defects in high performance microprocessor with a large n-way set associative cache Grant 7,370,151 - Asher , et al. May 6, 2	2008-05-06
Mechanism to control the allocation of an N-source shared buffer Grant 7,213,087 - Bertone , et al. May 1, 2	2007-05-01
Store instruction ordering for multi-core processor App 20060095741 - Asher; David H. ; et al.	2006-05-04
Local scratchpad and data caching system App 20060059310 - Asher; David H. ; et al.	2006-03-16
Method and apparatus for managing write back cache App 20060059316 - Asher; David H. ; et al.	2006-03-16
Scalable directory based cache coherence protocol Grant 6,918,015 - Kessler , et al. July 12, 2	2005-07-12
Method and system for absorbing defects in high performance microprocessor with a large n-way set associative cache App 20040088603 - Asher, David H. ; et al.	2004-05-06
Fast lane prefetching Grant 6,681,295 - Root , et al. January 20, 2	2004-01-20
Method and system for absorbing defects in high performance microprocessor with a large n-way set associative cache Grant 6,671,822 - Asher , et al. December 30, 2	2003-12-30
Method for reducing directory writes and latency in a high performance, directory-based, coherency protocol Grant 6,654,858 - Asher , et al. November 25, 2	2003-11-25
Scalable directory based cache coherence protocol App 20030196047 - Kessler, Richard E. ; et al.	2003-10-16
Scalable directory based cache coherence protocol Grant 6,633,960 - Kessler , et al. October 14, 2	2003-10-14
Profile directed simulation used to target time-critical crossproducts during random vector testing Grant 6,212,493 - Huggins , et al. April 3, 2	2001-04-03

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.