Ashburn; Stanton Petree

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ashburn; Stanton Petree.The latest application filed is for "methods and devices for determining logical to physical mapping on an integrated circuit".

Company Profile

0.7.10

Ashburn; Stanton Petree - McKinney TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods And Devices For Determining Logical To Physical Mapping On An Integrated Circuit App 20160245861 - Ashburn; Stanton Petree ; et al.	2016-08-25
Methods and devices for determining logical to physical mapping on an integrated circuit Grant 9,378,848 - Ashburn , et al. June 28, 2	2016-06-28
Memory repair categorization tracking Grant 9,305,664 - Pious , et al. April 5, 2	2016-04-05
Memory Repair Categorization Tracking App 20150279487 - Pious; Beena ; et al.	2015-10-01
Method of stressing static random access memories for pass transistor defects Grant 8,693,271 - Raval , et al. April 8, 2	2014-04-08
Methods And Devices For Determining Logical To Physical Mapping On An Integrated Circuit App 20130329508 - Ashburn; Stanton Petree ; et al.	2013-12-12
Method of screening static random access memories for pass transistor defects Grant 8,526,253 - Pious , et al. September 3, 2	2013-09-03
Method of Screening Static Random Access Memories for Pass Transistor Defects App 20130051169 - Pious; Beena ; et al.	2013-02-28
Method of Stressing Static Random Access Memories for Pass Transistor Defects App 20130039139 - Raval; Jayesh C. ; et al.	2013-02-14
Embedded gettering layer in shallow trench isolation structure App 20020070421 - Ashburn, Stanton Petree ; et al.	2002-06-13
Method for unpatterned resist etch back of shallow trench isolation refill insulator App 20020072237 - Bowles, Christopher Mark ; et al.	2002-06-13

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