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name:-0.015260934829712
name:-0.010710954666138
name:-0.004021167755127
Arriagada; Anton Patent Filings

Arriagada; Anton

Patent Applications and Registrations

Patent applications and USPTO patent grants for Arriagada; Anton.The latest application filed is for "series shunt biasing method to reduce parasitic loss in a radio frequency switch".

Company Profile
3.9.13
  • Arriagada; Anton - San Marcos CA
  • Arriagada; Anton - San Diego CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Antenna tuning and resonance adjustment system and method
Grant 11,394,408 - De Jongh , et al. July 19, 2
2022-07-19
Series Shunt Biasing Method To Reduce Parasitic Loss In A Radio Frequency Switch
App 20210351811 - VEDULA; Ravi Pramod Kumar ;   et al.
2021-11-11
Antenna Tuning And Resonance Adjustment System And Method
App 20210234561 - DE JONGH; Maurice Adrianus ;   et al.
2021-07-29
Antenna Aperture Tuning
App 20210083705 - Filipovic; Daniel ;   et al.
2021-03-18
Antenna aperture tuning
Grant 10,855,320 - Filipovic , et al. December 1, 2
2020-12-01
Antenna Aperture Tuning
App 20200106467 - Filipovic; Daniel ;   et al.
2020-04-02
Seal Ring Inductor
App 20200020760 - MOORE; Jarred ;   et al.
2020-01-16
Protection System For Radio Frequency Switches
App 20180204101 - DE JONGH; Maurice Adrianus ;   et al.
2018-07-19
Conductive seal ring for power bus distribution
Grant 9,881,881 - Brindle , et al. January 30, 2
2018-01-30
Trap rich layer with through-silicon-vias in semiconductor devices
Grant 9,558,951 - Arriagada , et al. January 31, 2
2017-01-31
Conductive Seal Ring For Power Bus Distribution
App 20170025368 - Brindle; Christopher N. ;   et al.
2017-01-26
Trap rich layer formation techniques for semiconductor devices
Grant 9,515,139 - Arriagada , et al. December 6, 2
2016-12-06
Trap Rich Layer Formation Techniques for Semiconductor Devices
App 20150287783 - Arriagada; Anton ;   et al.
2015-10-08
Trap rich layer formation techniques for semiconductor devices
Grant 9,064,697 - Arriagada , et al. June 23, 2
2015-06-23
Trap Rich Layer with Through-Silicon-Vias in Semiconductor Devices
App 20140030871 - Arriagada; Anton ;   et al.
2014-01-30
Trap Rich Layer Formation Techniques for Semiconductor Devices
App 20130344680 - Arriagada; Anton ;   et al.
2013-12-26
Trap rich layer with through-silicon-vias in semiconductor devices
Grant 8,581,398 - Arriagada , et al. November 12, 2
2013-11-12
Trap rich layer formation techniques for semiconductor devices
Grant 8,536,021 - Arriagada , et al. September 17, 2
2013-09-17
Trap rich layer with through-silicon-vias in semiconductor devices
Grant 8,481,405 - Arriagada , et al. July 9, 2
2013-07-09
Trap Rich Layer with Through-Silicon-Vias in Semiconductor Devices
App 20130147061 - Arriagada; Anton ;   et al.
2013-06-13
Trap Rich Layer Formation Techniques for Semiconductor Devices
App 20130084689 - Arriagada; Anton ;   et al.
2013-04-04
Trap Rich Layer with Through-Silicon-Vias in Semiconductor Devices
App 20130037922 - Arriagada; Anton ;   et al.
2013-02-14

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